Results 1 to 10 of about 11 (10)
Формальные спецификации в технологиях обратной инженерии и верификации программ.
KVEST (Kernel Verification and Specification Technology) – технология спецификации и верификации программного обеспечения, основанная на автоматизированной генерации тестов из формальных спецификаций.
И.Б. Бурдонов +4 more
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The paper presents a model-based approach to conformance testing of TLS implementations. It discusses the formal model of TLS protocol, the structure of the test suite. JavaTesK tool, based on UniTESK technology, was used to develop the test suite. A set
A. V. Nikeshin +2 more
doaj +1 more source
Test Suite development for verification of TLS security protocol
Despite the fact that TLS and its predecessor SSL are in use for more than 15 years, there are no accepted public conformance test suite for those protocols.
A. V. Nikeshin +2 more
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Automation of conformance testing for communication protocols
This article summarizes the experience gained while developing test suites for conformance testing of implementations of Internet protocols. The projects described in this article used the UniTESK technology as a base for constructing tests.
Nikolay Pakulin +2 more
doaj +1 more source
Evolution of UniTESK Test Development Technology
The paper presents the basic principles of UniTESK technology intended for test construction based on formal models. It also summarizes experience of using UniTESK in large test development projects for software and hardware systems, including ...
V. Kuliamin, A. Petrenko
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Conformance testing of Extensible Authentication Protocol implementations
The paper presents a model-based approach to conformance testing of Extensible Authentication Protocol (EAP) implementations. Conformance testing is the basic tool to ensure interoperability between implementations of a protocol. Using UniTESK technology
A. V. Nikeshin, V. Z. Shnitman
doaj +1 more source
In this work, an approach to generate test programs for functional verification of memory management units of microprocessors is proposed. The approach is based on formal specification of memory access instructions, namely load and store instructions ...
A. . Kamkin +2 more
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Formal specifications-based automation of system testing of hardware designs
This paper touches upon the problem of the system testing of interconnected hardware modules when the resulted hardware design cannot be verified by means of module-level techniques due to its complexity.
M. M. Chupilko.
doaj
Test Program Generation for Microprocessors Based on Pipeline Hazards Templates
In this work, a method for the automated test programs generation aimed at the verification of microprocessor control logic is considered. The method is based on formal specification of a microprocessor instruction set and description of pipeline hazards
D. N. Vorobyev, A. S. Kamkin
doaj

