Results 111 to 120 of about 3,089,886 (293)

An Analytical MOS Transistor Model Valid in All Regions of Operation and Dedicated to Low-Voltage and Low-Current Applications

open access: yes
LSI2special issue of the Analog Integrated Circuits and Signal Processing Journal on Low-Voltage and Low-Power ...
Vittoz, E. A.   +2 more
core   +1 more source

Design of a process monitor and of peripheral circuits enabling the characterisation of CMOS 45nm Ultra Low Power and Litho Friendly optimised standard cells [PDF]

open access: yes, 2008
L’evoluzione della tecnologia CMOS è caratterizzata dallo scaling delle dimensioni dei dispositivi e dalla riduzione del consumo di potenza. Dal momento che le difficoltà di realizzazione aumentano al diminuire delle dimensioni, nei nodi tecnologici più ...
TAGLIABUE, CLAUDIO
core  

Dynamically Actuated Reconfigurable Topographical Surface Enables Active Control of Implant‐Associated Infections

open access: yesAdvanced Functional Materials, EarlyView.
A dynamically actuated reconfigurable topographical surface (DARTS) integrates contact‐mediated bactericidal nanotopography with programmable mechanical actuation to actively disrupt bacterial biofilms. Dynamic surface reconfiguration enhances bacterial killing and suppresses implant‐associated infections in vivo, providing a new strategy for active ...
Mohammad Asadi Tokmedash   +4 more
wiley   +1 more source

Yield Model Characterization For Analog Integrated Circuit Using Pareto-Optimal Surface

open access: yes, 2008
A novel technique is proposed in this paper that achieves a yield optimized design from a set of optimal performance points on the Pareto front. Trade-offs among performance functions are explored through multi-objective optimization and Monte Carlo ...
Wilcock, Reuben   +3 more
core  

Sizing Analog Integrated Circuits by Current-Branches-Bias Assignments with Heuristics [PDF]

open access: yes, 2013
This work shows the usefulness of assigning current-branches-bias levels, in order to improve and accelerate the sizing optimization of MOSFET-based analog integrated circuits (ICs).
ESTEBAN TLELO CUAUTLE   +1 more
core  

2D Co‐Assembly of Solid Acids Enables Stable Superprotonic Conduction Above 260°C

open access: yesAdvanced Functional Materials, EarlyView.
A two‐dimensional co‐assembly strategy integrates antimony phosphate and phosphotungstic acid nanosheets into free‐standing inorganic lamellar membranes with confined acid–acid interfaces. The resulting interfacial hydrogen‐bond network enables anhydrous proton conductivity exceeding 0.1 S cm−1 at 260°C and supports stable high‐temperature fuel‐cell ...
Qiuning Li   +8 more
wiley   +1 more source

Balancing Hydrophobicity and Hydrophilicity: Dual Filler‐Engineered Proton Exchange Membranes for Durable, High‐Power Fuel Cells

open access: yesAdvanced Functional Materials, EarlyView.
Polarity‐matched Zr–MOFs program Nafion's nanoscale morphology during solution casting. Hydrophilic UiO‐66 preserves hydrated pathways, while hydrophobic UiO‐67 increases the proton hopping sites by densifying ionic clusters. Combining both fillers yields a membrane that delivers 176 mS cm−1 conductivity, reaches 1.46 W cm−2 under 200 kPa, and triples ...
Yonghwi Cho   +13 more
wiley   +1 more source

Gradient‐Conductivity Architecture Enables Synchronous Enhancement of Sensitivity and Detection Range in Multifunctional All‐Paper Sensors

open access: yesAdvanced Functional Materials, EarlyView.
A gradient‐engineered all‐paper sensor is fabricated by integrating MXene and in situ grown AgNPs within hierarchical cellulose networks. The device breaks the sensitivity–detection range trade‐off through cascaded conductive pathways, enabling ultrahigh pressure sensitivity, humidity–pressure decoupled dual‐mode sensing, and outstanding EMI shielding,
Ao Li   +7 more
wiley   +1 more source

Emerging Post‐CMOS Hardware Neurons for Brain‐Inspired Computing: Devices, Circuits, and System Integration

open access: yesAdvanced Functional Materials, EarlyView.
The physical realization of artificial neurons is a critical challenge for energy‐efficient neuromorphic computing. This review presents a comprehensive analysis of the evolution of artificial neuron implementations from conventional CMOS to emerging post‐CMOS technologies.
Kannan Udaya Mohanan   +4 more
wiley   +1 more source

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