Results 171 to 180 of about 1,067 (193)
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MOS Devices for Linear Analog Integrated Circuits
1989Most monolithic integrated circuits can be classified into three large groups: silicon bipolar circuits based on bipolar transistors [1], MOS (metal-oxide-semiconductor) circuits which use MOS field-effect transistors as the basic active elements [1–10] and GaAs (Gallium-Arsenide) circuits employing GaAs transistors [63, 64].*
Rolf Unbehauen, Andrzej Cichocki
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SCMOS: a software tool for studying the behavior of analog MOS integrated circuits
31st Annual Frontiers in Education Conference. Impact on Engineering and Science Education. Conference Proceedings (Cat. No.01CH37193), 2002The study of analog integrated circuits can be carried out at several levels, from the structure and operation of their basic building blocks to the design methodologies. At any of these levels there is a need for tools that allow the influence of design parameters in the behavior of the circuits to be clearly shown to the students. This paper presents
J. Farina +2 more
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Worst case analysis of low-voltage analog MOS integrated circuits
38th Midwest Symposium on Circuits and Systems. Proceedings, 2002A methodology for worst case analysis of low voltage analog MOS integrated circuits is presented. It relates parameter to current mismatch in a transistor pair analytically and the current mismatch is regarded as a random variable. It is shown that the algorithm is efficient and is readily extended to the circuit level. The effect of the active area of
null Hing-Yan To, C. Michael, M. Ismail
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Yield optimization of analog MOS integrated circuits including transistor mismatch
1993 IEEE International Symposium on Circuits and Systems, 2002With the aid of the SMOS (statistical MOS) model, it is presently possible to simulate random device mismatch effects on the circuit performance. Two different optimization algorithms, which, together with the SMOS model, can create an efficient CAD environment for integrated circuit designers are presented.
H. Su, C. Michael, M. Ismail
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A method to predict harmonic distortion in small-geometry MOS analog integrated circuits
IEEE Journal of Solid-State Circuits, 1987A method to predict the small-signal linear gain and level of harmonic distortion in analog MOS circuits is presented. This method, based on a generalized nonlinear transfer function approach, lends itself to implementation in the AC small-signal analysis routine of the circuit simulation program SPICE.
M.J. Thoma, W.T. Baumann, C.R. Westgate
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Bipolar and MOS Analog Integrated Circuit Design
Electronics and Power, 1985openaire +2 more sources
An integrated approach to realistic worst-case design optimization of MOS analog circuits
[1992] Proceedings 29th ACM/IEEE Design Automation Conference, 2003Abhijit Dharchoudhury, Sung-Mo Kang
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Low-Voltage Analog Integrated Circuit Design
Engergy Systems in Electrical Engineering, 2020Deepika Gupta, Gupta Deepika
exaly
An MOS transistor model for analog circuit design
IEEE Journal of Solid-State Circuits, 1998CARLOS Galup-Montoro, M C Schneider
exaly