Results 21 to 30 of about 107 (94)
International Journal of Reconfigurable Computing, Volume 2019, Issue 1, 2019., 2019 Translating a system requirement into a low‐level representation (e.g., register transfer level or RTL) is the typical goal of the design of FPGA‐based systems. However, the Design Space Exploration (DSE) needed to identify the final architecture may be time consuming, even when using high‐level synthesis (HLS) tools. In this article, we illustrate our
Roberto Giorgi +3 more
wiley +1 more source
Power‐Efficient Computing: Experiences from the COSA Project
Scientific Programming, Volume 2017, Issue 1, 2017., 2017 Energy consumption is today one of the most relevant issues in operating HPC systems for scientific applications. The use of unconventional computing systems is therefore of great interest for several scientific communities looking for a better tradeoff between time‐to‐solution and energy‐to‐solution.
Daniele Cesini +18 more
wiley +1 more source
Experimental Evaluation of ZigBee‐Based Wireless Networks in Indoor Environments
Journal of Engineering, Volume 2013, Issue 1, 2013., 2013 ZigBee is an emerging standard specifically designed for wireless personal area networks (WPANs) with a focus on enabling the wireless sensor networks (WSNs). It attempts to provide a low‐data rate, low‐power, and low‐cost wireless networking on the device‐level communication.
Jin-Shyan Lee +2 more
wiley +1 more source
Power Line Communications for Smart Grid Applications
Journal of Electrical and Computer Engineering, Volume 2013, Issue 1, 2013., 2013 Power line communication, that is, using the electricity infrastructure for data transmission, is experiencing a renaissance in the context of Smart Grid. Smart Grid objectives include the integration of intermittent renewable energy sources into the electricity supply chain, securing reliable electricity delivery, and using the existing electrical ...
Lars Torsten Berger +3 more
wiley +1 more source
A Comparison of C++ Sockets and Corba in a Distributed Matrix Multiply Application [PDF]
, 1999 (Maximum 200 words.) This project has two primary purposes. The first, is to implement a distributed matrix multiply algorithm using C++ sockets, andCorba objects with the objective of discovering what additional overhead, if any, exists in aCorba ...
M. Schnaidt +6 more
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IET Optoelectronics, Volume 19, Issue 1, January/December 2025.The proposed system architecture of joint data and power transfer based on optical technology to in‐body electronics devices. ABSTRACT This study presents a proof‐of‐concept system for the joint wireless transfer of data and power to in‐body electronic devices (IEDs) using near‐infrared (NIR) light technology. The proposed system addresses two critical
Syifaul Fuada +2 more
wiley +1 more source
High‐Level Synthesis of In‐Circuit Assertions for Verification, Debugging, and Timing Analysis
International Journal of Reconfigurable Computing, Volume 2011, Issue 1, 2011., 2011 Despite significant performance and power advantages compared to microprocessors, widespread usage of FPGAs has been limited by increased design complexity. High‐level synthesis (HLS) tools have reduced design complexity but provide limited support for verification, debugging, and timing analysis.
John Curreri +3 more
wiley +1 more source
UNIX system programming using C++ [PDF]
, 1997 If you're an experienced UNIX system programmer working with C++, UNIX System Programming Using C++ brings together all the advanced techniques you need to build complex and high-quality system applications.
Chan, Terrence
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Comprehensive Safety Assessment of Hydrogen: From Production to Application in Energy Systems
International Journal of Energy Research, Volume 2025, Issue 1, 2025.In the quest for sustainable and clean energy alternatives to fossil fuels, hydrogen emerges as a front‐runner due to its high energy yield and environmentally friendly combustion byproduct, water. This study delves into the comprehensive lifecycle of hydrogen energy, from its production through various methods, storage, and transportation, to its ...
Ahmed Nazmus Sakib +5 more
wiley +1 more source
The Potential for a GPU‐Like Overlay Architecture for FPGAs
International Journal of Reconfigurable Computing, Volume 2011, Issue 1, 2011., 2011 We propose a soft processor programming model and architecture inspired by graphics processing units (GPUs) that are well‐matched to the strengths of FPGAs, namely, highly parallel and pipelinable computation. In particular, our soft processor architecture exploits multithreading, vector operations, and predication to supply a floating‐point pipeline ...
Jeffrey Kingyens +2 more
wiley +1 more source