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Machine learning approach to topological graph descriptors of graphene nanoribbons. [PDF]
Front ChemJyothish K +5 more
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Quantum Arithmetic Circuits: A Survey
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2009 Quantum circuits for elementary arithmetic operations are important not only for implementing Shor's factoring algorithm on a quantum computer but also for understanding the computational power of small quantum circuits, such as linear-size or logarithmic-depth quantum circuits.
Yasuhiro Takahashi
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Threshold-gates in arithmetic circuits
ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483), 2002In this paper the design of digital CMOS threshold logic circuits for low power applications is investigated. Two different basic elements for threshold circuits are presented. These circuits are characterized with regard to power and speed. More complex functions, i.e. a 1-bit full adder and an 8-bit carry-lookahead adder are given.
Christian Burwick +3 more
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Logic Debugging of Arithmetic Circuits
2015 IEEE Computer Society Annual Symposium on VLSI, 2015This paper presents a novel diagnosis and logic debugging method for gate-level arithmetic circuits. It detects logic bugs in a synthesized circuit caused by using a wrong gate ("gate replacement" error), which change the functionality of the circuit.
Samaneh Ghandali +4 more
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Arithmetic circuits for analog digits
Proceedings 1999 29th IEEE International Symposium on Multiple-Valued Logic (Cat. No.99CB36329), 2003The Overlap Resolution Number System (ORNS) employs bit level analog residue arithmetic, and opens up a powerful approach to digital computing. This new redundant representation of signals, with Continuous Valued Digits, presents new methods for binary arithmetic and digital signal processing.
Aryan Saed +2 more
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Survey of arithmetic integrated circuits
1978 IEEE 4th Symposium onomputer Arithmetic (ARITH), 1978The purpose of this report is to provide the state-of-the-art of high performance arithmetic integrated circuits (ICs). The survey concentrates on arithmetic ICs that are designed to improve execution speed over software techniques, therefore, no calculator chips are surveyed.
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On Multiparty Garbling of Arithmetic Circuits
2018We initiate a study of garbled circuits that contain both Boolean and arithmetic gates in secure multiparty computation. In particular, we incorporate the garbling gadgets for arithmetic circuits recently presented by Ball, Malkin, and Rosulek (ACM CCS 2016) into the multiparty garbling paradigm initially introduced by Beaver, Micali, and Rogaway (STOC
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