Results 61 to 70 of about 15,344 (252)
Fast Rate Estimation for RDO Mode Decision in HEVC
The latter-day H.265/HEVC video compression standard is able to provide two-times higher compression efficiency compared to the current industrial standard, H.264/AVC. However, coding complexity also increased.
Maxim P. Sharabayko, Oleg G. Ponomarev
doaj +1 more source
Tissue incision induces CXCL5 release, which activates neuronal CXCR2 on incision‐innervating sensory neurons. Neuronal CXCR2 couples with TRPA1 to drive mechanical pain and engages p38 MAPK signaling to upregulate TRPV1 and promote heat pain. Targeted Cxcr2 knockdown relieves incisional pain while preserving CXCR2‐dependent neutrophil responses ...
Yushuang Pan +10 more
wiley +1 more source
Novel Area Optimization in FPGA Implementation Using Efficient VHDL Code
A new novel method for area efficiency in FPGA implementation is presented. The method is realized through flexibility and wide capability of VHDL coding. This method exposes the arithmetic operations such as addition, subtraction and others.
Zulfikar Zulfikar
doaj +3 more sources
A high capacity data hiding method using lossless compression, advanced encryption standard (AES), modified pixel value differencing (MPVD), and least significant bit (LSB) substitution is presented.
Awdhesh Kumar Shukla +3 more
doaj +1 more source
Arithmetic codes are usually deemed as the most important means to implement lossless source coding, whose principle is mapping every source symbol to a sub-interval in [0, 1). For every source symbol, the length of its mapping sub-interval is exactly equal to its probability.
openaire +2 more sources
Abstract Transformer‐based molecular models pretrained on SMILES strings demonstrate strong performance in property prediction. However, these model often lack explicit integration of molecular surface charge distributions that govern intermolecular interactions such as hydrogen bonding and polarity.
Tae Hyun Kim +2 more
wiley +1 more source
Hardware acceleration of number theoretic transform for zk‐SNARK
An FPGA‐based hardware accelerator with a multi‐level pipeline is designed to support the large‐bitwidth and large‐scale NTT tasks in zk‐SNARK. It can be flexibly scaled to different scales of FPGAs and has been equipped in the heterogeneous acceleration system with the help of HLS and OpenCL.
Haixu Zhao +6 more
wiley +1 more source
Compression and Decompression of Audio Files Using the Arithmetic Coding Method
Audio file size is relatively larger when compared to files with text format. Large files can cause various obstacles in the form of large space requirements for storage and a long enough time in the shipping process.
Parasian D. P Silitonga +1 more
doaj +1 more source
A Memristor‐Based In‐Memory Computing System‐on‐Chip with Efficient Depthwise Convolution
We present a memristor‐based in‐memory computing (IMC) architecture that enables efficient depthwise convolution (DWC) acceleration. Fabricated in a system‐on‐chip with crossbar arrays, the design improves memory utilization. Experimental validation demonstrates the first hardware acceleration of DWC in IMC, achieving a digital comparable inference ...
Wenhao Song +21 more
wiley +1 more source
Complex dynamics, often avoided in electromechanical design, can enhance soft robotics. We develop durable magnetic soft actuators operating in tunable dynamic regimes, enabling random number generation, stochastic computing, and time‐series prediction.
Eduardo Sergio Oliveros‐Mata +14 more
wiley +1 more source

