Results 31 to 40 of about 118,547,681 (99)
Transactions on Cryptographic Hardware and Embedded Systems, 2018 We present high-speed implementations of the post-quantum supersingular isogeny Diffie-Hellman key exchange (SIDH) and the supersingular isogeny key encapsulation (SIKE) protocols for 32-bit ARMv7-A processors with NEON support.
Hwajeong Seo +3 more
doaj +1 more source
High-Speed Fault Attack Resistant Implementation of PIPO Block Cipher on ARM Cortex-A
IEEE Access, 2021 In ICISC’20 conference, PIPO (Plug-In and Plug-Out) was proposed as an efficient block cipher for secure communication in IoT (Internet of Things) environment.
Jingyo Song +2 more
doaj +1 more source
The Semantics of Multicopy Atomic ARMv8 and RISC-V [PDF]
, 2019 Previous work has established precise operational concurrency models for Power and ARMv8, in an abstract micro-architectural style based on detailed discussion with IBM and ARM staff and extensive hardware testing.
core +2 more sources
Adaptive Hybrid Storage Format for Sparse Matrix–Vector Multiplication on Multi-Core SIMD CPUs
Applied Sciences, 2022 Optimizing sparse matrix–vector multiplication (SpMV) is challenging due to the non-uniform distribution of the non-zero elements of the sparse matrix. The best-performing SpMV format changes depending on the input matrix and the underlying architecture,
Shizhao Chen +3 more
doaj +1 more source
Descripción de las maneras de emplear la extensión avanzada SIMD en las arquitecturas ARMv7-A y ARMv8-A de los procesadores ARM [PDF]
, 2022 Realizar una descripción sobre los diferentes métodos de utilizar la extensión avanzada SIMD en las arquitecturas ARMv7-A y ARMv8-A de los procesadores ARM, así explicar las características, los registros internos y las instrucciones de la extensión ...
Osorio Chamam, Manuel Estuardo
core +1 more source
SOTPM: Software One-Time Programmable Memory to Protect Shared Memory on ARM Trustzone
IEEE Access, 2021 In ARM TrustZone-based architecture, shared memory is one of the most useful schemes to enable isolated execution environments supported by TrustZone to communicate between environments.
Dongwook Shim, Dong Hoon Lee
doaj +1 more source
ISA semantics for ARMv8-a, RISC-v, and CHERI-MIPS [PDF]
, 2019 Architecture specifications notionally define the fundamental interface between hardware and software: the envelope of allowed behaviour for processor implementations, and the basic assumptions for software development and verification.
French, Jon +13 more
core +2 more sources
Simplifying ARM concurrency : multicopy-atomic axiomatic and operational models for ARMv8 [PDF]
, 2017 ARM has a relaxed memory model, previously specified in informal prose for ARMv7 and ARMv8. Over time, and partly due to work building formal semantics for ARM concurrency, it has become clear that some of the complexity of the model is not justified by ...
French, Jon +12 more
core +2 more sources
Metrics and Tools for Evaluating the Deviation in Parallel Timing [PDF]
Jisuanji kexueIn parallel computing,instrumenting specific code segments is commonly used for performance evaluation on multicore processors.However,factors such as timing methods,hardware configurations,and runtime environments affect parallel timing accuracy ...
LIAO Qiucheng, ZHOU Yang, LIN Xinhua
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A High Assurance Virtualization Platform for ARMv8 [PDF]
, 2016 This paper presents the first results from the ongoing research project HASPOC, developing a high assurance virtualization platform for the ARMv8 CPU architecture.
Mats Naslund +14 more
core +1 more source