Results 251 to 260 of about 664,460 (300)
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Inkjet-Configurable Gate Arrays (IGA)

IEEE Transactions on Emerging Topics in Computing, 2017
Implementation of organic digital circuits (or printed electronic circuits) has been under an extensive investigation, facing some critical challenges such as process variability, device performance, cell design styles and circuit yield. Failure in any single Organic Thin Film Transistor (OTFT) often causes the whole circuit to fail since integration ...
Jordi Carrabina   +3 more
openaire   +2 more sources

Configurable microcontroller array

Proceedings. International Conference on Parallel Computing in Electrical Engineering, 2003
In this paper, the configurable microcontroller array based on the i8051 processor unit (PU) architecture is proposed. The use of the well-known PU architecture simplifies the application programming. The designed microcontroller PU core has in 6 times higher instruction implementation speed, and in more than 2.5 times clock frequency than the original
Oleg Maslennikov   +2 more
openaire   +1 more source

A CMOS electrically configurable gate array

IEEE Journal of Solid-State Circuits, 1989
A CMOS electrically configurable gate array that combines the flexibility, efficiency, extendability, and performance of mask-programmed gate arrays with the convenience of user programmability is described. The implementation is facilitated by a novel two-terminal antifuse programmable element and a configurable interconnect technology.
Khaled A. El-Ayat   +8 more
openaire   +1 more source

Bent Configurations of Waveguide Slot Arrays

2019 IEEE 90th Vehicular Technology Conference (VTC2019-Fall), 2019
The slot array antenna is used for pattern- critical applications including satellite communications and radar. In most mobile communications antennas, the pattern detail at the mobile terminal is not critical because of the distributed target of a multipath propagation environment.
Roshanak Zabihi   +2 more
openaire   +1 more source

Configurable folded array for FIR filtering

Journal of Systems Architecture, 2008
The synthesis of configurable bit-plane processing array for FIR filtering is described in this paper. Possibilities for configuration are explored and encompassed by application of folding technique. The proposed folded architecture supports on-the-fly configuration of number of taps and coefficient length.
Vladimir M. Ciric, Ivan Z. Milentijevic
openaire   +1 more source

An architecture for electrically configurable gate arrays

IEEE Journal of Solid-State Circuits, 1989
A novel architecture for CMOS electrically configurable gate arrays using a two-terminal antifuse element is described. The architecture is extensible and can provide a level of integration comparable to mask-programmable gate arrays. This is accomplished by using a conventional gate array organization with rows of logic modules separated by wiring ...
Abbas El Gamal   +5 more
openaire   +1 more source

Sensor configuration in polarized antenna arrays

Proceedings of the Eighth International Symposium on Signal Processing and Its Applications, 2005., 2006
Single- and dual-polarized array configurations are often used in imaging and radar applications. In this paper, spatio-polarimetric correlation are used as a framework to evaluate the direction finding performance of dierent receiver configurations employing double-feed dual-polarized array as well as arrays of single-feed single-polarized elements ...
Baha A. Obeidat   +3 more
openaire   +1 more source

The array configuration design of the Atacama Compact Array

SPIE Proceedings, 2008
The Atacama Compact Array (ACA) is an array composed of twelve 7-m dishes and four 12-m dishes. The ACA is designed for use as a part of the ALMA (Atacama Large Millimeter / Submillimeter Array) to provide high fidelity imaging capability for large extended objects.
Koh-Ichiro Morita, Mark A. Holdaway
openaire   +1 more source

Configurable Detector Array Test Station

SPIE Proceedings, 1989
An advanced test station has been developed to test integrated focal plane array (FPA) hardware. This test system is intended to test readouts, sensor chip assemblies, modules, and complete FPAs. The test station was developed in response to existing and anticipated project requirements that exceed the performance capabilities of existing test stations.
M.R. Rodgers, W.H. Freudenstein
openaire   +1 more source

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