Results 221 to 230 of about 115,301 (270)
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Design and construction of a balanced ternary ALU with potential future cybernetic intelligent systems applications

2012 IEEE 11th International Conference on Cybernetic Intelligent Systems (CIS), 2012
Central to the operation of any future cybernetic intelligent system based on digital principles is the method of representation of individual states in the system, together with the fundamental operations for moving from one state to the next. All modern computer systems on which these cybernetic systems are based have the binary representational ...
M. Eaton
openaire   +2 more sources

Balanced Ternary Logic Gates with Memristors

International Conference on Electronics, Circuits, and Systems, 2022
Classical binary computing technology utilises tran-sistor scaling for improved performance. However, with predicted limits of transistor scaling, alternative logic systems like ternary systems are gaining attraction. Furthermore, neural network circuits
Moin Diwan   +3 more
semanticscholar   +1 more source

Exploration of Ternary Logic Using T-CMOS for Circuit-Level Design

IEEE Transactions on Circuits and Systems Part 1: Regular Papers, 2023
The predicted end of scaling and the exponential increase of user data in the era of the connected world are asking whether the current binary systems in CMOS can successfully provide solutions to the expected challenges.
Jonghyun Ko   +4 more
semanticscholar   +1 more source

CONSTRUCTION OF BALANCED TERNARY DESIGNS

Australian Journal of Statistics, 1986
SummaryIn this paper variance balanced ternary designs are constructed in unequal block sizes for situations when suitable BIB designs do not exist for a given number of treatments because of the constraints bk=vr,and λ(v ‐ 1) =r(k‐ 1).
Agarwal, G. G., Kumar, Sanjay
openaire   +2 more sources

Beyond CMOS: Ternary and mixed radix CNTFET circuit design, simulation and verification

International Symposium on Circuits and Systems, 2022
For three-valued or ternary computing to be an alternative for binary, new multiple valued logic (MVL) electronic design automation (EDA) tools are needed. In this article we present a novel MVL logic synthesis tool to generate binary, ternary and hybrid
Steven Bos   +2 more
semanticscholar   +1 more source

An Optimal Design Methodology of Ternary Logic in Iso-device Ternary CMOS

IEEE International Symposium on Multiple-Valued Logic, 2021
Studies report the possibility of the end of scaling, which is the key engine that has led the era of binary computers. Ternary computing is reported to have one of the highest potential to replace binary computers in the near future.
Jonghyun Ko   +5 more
semanticscholar   +1 more source

Balanced ternary designs with block size four

Journal of Statistical Planning and Inference, 1993
A \(\text{BTD}(v,\rho_ 2,4,\lambda)\) is a balanced ternary design such that \(k=4\) and each element occurs two times in \(\rho_ 2\) blocks (and, of course, each pair of distinct elements occurs \(\lambda\) times in a block). A necessary existence condition for such a BTD is: if \(\lambda=2\) then \(v \geq 5 \rho_ 2+1\), if \(\lambda=3\) then \(v \geq
Billington, Elizabeth J.   +2 more
openaire   +3 more sources

Some Constructions of Balanced Ternary Residual Treatment Effects Designs

Journal of Statistical Theory and Practice, 2010
zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Aggarwal, Manohar, Jha, Mithilesh Kumar
openaire   +2 more sources

Tekum: Balanced Ternary Tapered Precision Real Arithmetic

arXiv.org
In light of recent hardware advances, it is striking that real arithmetic in balanced ternary logic has received almost no attention in the literature.
Laslo Hunhold
semanticscholar   +1 more source

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