Results 131 to 140 of about 573,488 (144)
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Instruction Profiling Based Fetch Throttling for Wasted Dynamic Power Reduction
Symposium on Computer Architecture and High Performance Computing, 2019In superscalar processors the throughput of the early pipeline stages will impose an upper bound on the throughput of all the subsequent stages. Therefore, to achieve high performance, maximum instruction fetch bandwidth is maintained.
A. Owahid, E. John
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IEEE Transactions on Parallel and Distributed Systems
Commercial embedded systems increasingly rely on heterogeneous architectures that integrate general-purpose, multi-core processors, and various hardware accelerators on the same chip.
Giacomo Valente +6 more
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Commercial embedded systems increasingly rely on heterogeneous architectures that integrate general-purpose, multi-core processors, and various hardware accelerators on the same chip.
Giacomo Valente +6 more
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S-Glint: Secure Federated Graph Learning With Traffic Throttling and Flow Scheduling
IEEE Transactions on Green Communications and Networking, 2023Tao Liu, Pengjie Li, Yu-Zong Gu, Zhou Su
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Design Automation Conference, 2016
Bhavya K. Daya, L. Peh, A. Chandrakasan
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Bhavya K. Daya, L. Peh, A. Chandrakasan
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A Scalable Network Monitoring and Bandwidth Throttling System for Cloud Computing
, 2010 Huysamen Nf, Krzesinski Aes
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Transient Thermal Analysis for M.2 SSD Thermal Throttling: Detailed CFD Model vs Network-Based Model
Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, 2018Hedan Zhang +7 more
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PABST: Proportionally Allocated Bandwidth at the Source and Target
International Symposium on High-Performance Computer Architecture, 2017Derek Hower +2 more
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