Results 211 to 220 of about 235 (222)
Some of the next articles are maybe not open access.

Online BIST and BIST-based diagnosis of FPGA logic blocks

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2004
M Abramovici
exaly  

On improving test quality of scan-based BIST

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2000
Kwang-Ting Cheng, S Bhawmik
exaly  

A Flexible Programmable Memory BIST Architecture

IETE Journal of Education Online, 2010
Philemon Daniel, Rajeevan Chandel
exaly  

Symmetry Measure for Memory Test and Its Application in BIST Optimization

Journal of Electronic Testing: Theory and Applications (JETTA), 2011
Gurgen Harutyunyan, Yervant Zorian
exaly  

A Low-Cost Concurrent BIST Scheme for Increased Dependability

IEEE Transactions on Professional Communication, 2005
I Voyiatzis, C Halatsis
exaly  

A BIST TPG for Low Power Dissipation and High Fault Coverage

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2007
Seongmoon Wang
exaly  

A Distributed, Reconfigurable, and Reusable BIST Infrastructure for Test and Diagnosis of 3-D-Stacked ICs

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2016
Mukesh Agrawal, Krishnendu Chakrabarty
exaly  

Built-in self-test (BIST) structure for analog circuit fault diagnosis

IEEE Transactions on Instrumentation and Measurement, 1990
C -L Wey
exaly  

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