Simultaneous Bilateral Pediatric Nephrectomies: Indications, Approach and Outcomes Over a 15-Year Period. [PDF]
Lombardo AM +7 more
europepmc +1 more source
Advancing cardiovascular disease diagnosis with an interpretable and responsible AI framework. [PDF]
Hasan KS, Dhrubo IS.
europepmc +1 more source
Uncertainty-Aware Parking Prediction Using Bayesian Neural Networks. [PDF]
Nezhadettehad A +3 more
europepmc +1 more source
Beyond Accuracy: Enhancing Parkinson's Diagnosis with Uncertainty Quantification of Machine Learning Models. [PDF]
Azad A, Islam MS, Hoque E, Rahman MS.
europepmc +1 more source
"Getting to diagnosis was an absolute nightmare": survey insights about the lived experience of spinal CSF leak in Australia and Aotearoa New Zealand. [PDF]
Knight LSW +7 more
europepmc +1 more source
FPGA Architecture Enhancements for Efficient BNN Implementation [PDF]
Binarized neural networks (BNNs) are ultra-reduced precision neural networks, having weights and activations restricted to single-bit values. BNN computations operate on bitwise data, making them particularly amenable to hardware implementation. In this paper, we first analyze BNN implementations on contemporary commercial 20nm FPGAs.
Jin Hee Kim +2 more
openaire +2 more sources
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LP-BNN: Ultra-low-Latency BNN Inference with Layer Parallelism
2019 IEEE 30th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2019High inference latency seriously limits the deployment of DNNs in real-time domains such as autonomous driving, robotic control, and many others. To address this emerging challenge, researchers have proposed approximate DNNs with reduced precision, e.g., Binarized Neural Networks (BNNs).
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A high-throughput scalable BNN accelerator with fully pipelined architecture
CCF Transactions on High Performance Computing, 2021By replacing multiplication with XNOR operation, Binarized Neural Networks (BNN) are hardware-friendly and extremely suitable for FPGA acceleration. Previous researches highlighted the potential exploitation of BNNs performance. However, most of the present researches targeted at minimizing chip areas.
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BNN Training Algorithm with Ternary Gradients and BNN based on MRAM Array
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