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Fault diagnosis and logic debugging using Boolean satisfiability
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2005exaly
Sub-SAT: a formulation for relaxed boolean satisfiability with applications in routing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2003exaly
Analysis and Implementation of Public-Key Cryptosystem based on the Boolean Satisfiability Problem
exalyAugment with Care: Contrastive Learning for the Boolean Satisfiability Problem.
CoRRHaonan Duan 0002 +4 more
openaire +1 more source