Results 31 to 40 of about 5,314 (170)
A Class of In-Place Linear Transformations Possessing the Cache-Oblivious Property
IEEE Access, 2019 In-place linear transformations allow input to be overwritten with the output of the transformation. This paper presents a family of in-place linear transformations based on block lower/upper (LU) decompositions, of which the known transformation via LU ...
Zhe Zhao, Sian-Jheng Lin, Nenghai Yu
doaj +1 more source
URM: A Unified RAM Management Scheme for NAND Flash Storage Devices
Discrete Dynamics in Nature and Society, Volume 2022, Issue 1, 2022., 2022 In NAND flash storage devices, the random access memory (RAM) is composed of a data buffer and mapping cache that play critical roles in storage performance. Furthermore, as the capacity growth rate of RAM chips lags far behind that of flash memory chips, determining how to take advantage of precious RAM is still a crucial issue. However, most existing
A. Xiaochang Li +5 more
wiley +1 more source
The Melbourne Shuffle: Improving Oblivious Storage in the Cloud [PDF]
, 2014 We present a simple, efficient, and secure data-oblivious randomized shuffle algorithm. This is the first secure data-oblivious shuffle that is not based on sorting. Our method can be used to improve previous oblivious storage solutions for network-based
B. Pinkas +6 more
core +1 more source
Optimal Cache-Oblivious Mesh Layouts [PDF]
, 2009 A mesh is a graph that divides physical space into regularly-shaped regions. Meshes computations form the basis of many applications, e.g. finite-element methods, image rendering, and collision detection.
Bender, Michael A. +3 more
core +2 more sources
Strongly Secure and Efficient Data Shuffle On Hardware Enclaves
, 2017 Mitigating memory-access attacks on the Intel SGX architecture is an important and open research problem. A natural notion of the mitigation is cache-miss obliviousness which requires the cache-misses emitted during an enclave execution are oblivious to ...
Almeida J. B. +6 more
core +1 more source
Cache-Oblivious Selection in Sorted X+Y Matrices
, 2008 Let X[0..n-1] and Y[0..m-1] be two sorted arrays, and define the mxn matrix A by A[j][i]=X[i]+Y[j]. Frederickson and Johnson gave an efficient algorithm for selecting the k-th smallest element from A. We show how to make this algorithm IO-efficient.
de Berg, Mark, Thite, Shripad
core +3 more sources
Stochastic Dynamic Cache Partitioning for Encrypted Content Delivery
, 2016 In-network caching is an appealing solution to cope with the increasing bandwidth demand of video, audio and data transfer over the Internet. Nonetheless, an increasing share of content delivery services adopt encryption through HTTPS, which is not ...
Araldo, Andrea +2 more
core +2 more sources
Multicore-optimized wavefront diamond blocking for optimizing stencil updates [PDF]
, 2014 The importance of stencil-based algorithms in computational science has focused attention on optimized parallel implementations for multilevel cache-based processors.
Hager, Georg +5 more
core +1 more source
Optimising Simulation Data Structures for the Xeon Phi [PDF]
, 2016 In this paper, we propose a lock-free architecture to accelerate logic gate circuit simulation using SIMD multi-core machines. We evaluate its performance on different test circuits simulated on the Intel Xeon Phi and 2 other machines.
Chimeh, Mozhgan K., Cockshott, Paul
core +1 more source
Cache-Oblivious Peeling of Random Hypergraphs
, 2013 The computation of a peeling order in a randomly generated hypergraph is the most time-consuming step in a number of constructions, such as perfect hashing schemes, random $r$-SAT solvers, error-correcting codes, and approximate set encodings.
Belazzougui, Djamal +4 more
core +1 more source