Results 11 to 20 of about 4,058 (161)
On consistency maintenance in service discovery [PDF]
Communication and node failures degrade the ability of a service discovery protocol to ensure Users receive the correct service information when the service changes.
Hartel, P.H. +2 more
core +5 more sources
Hybrid Update/Invalidate Schemes for Cache Coherence Protocols
Appearing in MSTUCA Scientific Bulletin - August 2015, sec:CS; 10 pages, 6 ...
R. V. Dovgopol, M. .. Rosonke
openaire +5 more sources
RPPM : Rapid Performance Prediction of Multithreaded workloads on multicore processors [PDF]
Analytical performance modeling is a useful complement to detailed cycle-level simulation to quickly explore the design space in an early design stage. Mechanistic analytical modeling is particularly interesting as it provides deep insight and does not ...
Akram, Shoaib +3 more
core +2 more sources
Timestamp-based cache invalidation for search engines [PDF]
We propose a new mechanism to predict stale queries in the result cache of a search engine. The novelty of our approach is in the use of timestamps in staleness predictions. We show that our approach incurs very little overhead on the system while its prediction accuracy is comparable to earlier works.
Alıcı, Sadiye +4 more
openaire +2 more sources
On the performance of routing algorithms in wormhole-switched multicomputer networks [PDF]
This paper presents a comparative performance study of adaptive and deterministic routing algorithms in wormhole-switched hypercubes and investigates the performance vicissitudes of these routing schemes under a variety of network operating conditions ...
Ould-Khaoua, M., Shahrabi, A.
core +1 more source
FASTM: a log-based hardware transactional memory with fast abort recovery [PDF]
Version management, one of the key design dimensions of Hardware Transactional Memory (HTM) systems, defines where and how transactional modifications are stored. Current HTM systems use either eager or lazy version management.
González Colás, Antonio María +2 more
core +1 more source
Performance of the Cray T3D and Emerging Architectures on Canopy QCD Applications [PDF]
The Cray T3D, an MIMD system with NUMA shared memory capabilities and in principle very low communications latency, can support the Canopy framework for grid-oriented applications. CANOPY has been ported to the T3D, with the intent of making it available
Fischler, Mark, Uchima, Mike
core +3 more sources
Delayed precise invalidation – a software cache coherence scheme [PDF]
Software cache coherence schemes are very desirable in the design of scalable multiprocessors and massively parallel processors. The authors propose a software cache coherence scheme named 'delayed precise invalidation' (DPI). DPI is based on compiler-time markings of references and a hardware local invalidation of state data in parallel and ...
T.-S. Hwang, N.-P. Lu, C.-P. Chung
openaire +1 more source
Optimal memory time Cache partitioning in chip-multiprocessors
Optimal memory time Cache partitioning(OMTP) was proposed.The OMTP can get the average access invalidation overheads of different application and Cache line distributation about Cache hit through the characteristic obtain unit.According to which the OMTP
Hao LI, Lun-guo XIE
doaj +2 more sources
AN AGENT BASED TRANSACTION PROCESSING SCHEME FOR DISCONNECTED MOBILE NODES [PDF]
We present a mobile transaction framework in which mobile users can share data which is stored in the cache of a mobile agent. This mobile agent is a special mobile node which coordinates the sharing process.
J.L. Walter Jeyakumar, R.S. Rajesh
doaj

