RPPM : Rapid Performance Prediction of Multithreaded workloads on multicore processors [PDF]
, 2019 Analytical performance modeling is a useful complement to detailed cycle-level simulation to quickly explore the design space in an early design stage. Mechanistic analytical modeling is particularly interesting as it provides deep insight and does not ...
Akram, Shoaib +3 more
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Performance of the Cray T3D and Emerging Architectures on Canopy QCD Applications [PDF]
, 1995 The Cray T3D, an MIMD system with NUMA shared memory capabilities and in principle very low communications latency, can support the Canopy framework for grid-oriented applications. CANOPY has been ported to the T3D, with the intent of making it available
Fischler, Mark, Uchima, Mike
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DotSlash: Providing Dynamic Scalability to Web Applications with On-demand Distributed Query Result Caching [PDF]
, 2005 Scalability poses a significant challenge for today's web applications, mainly due to the large population of potential users. To effectively address the problem of short-term dramatic load spikes caused by web hotspots, we developed a self-configuring ...
Schulzrinne, Henning G., Zhao, Weibin
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Design and analysis of channel adaptive wireless cache invalidation strategies with downlink traffic [PDF]
, 2004 In this paper, we study the performance of the IR+UIR wireless data cache Invalidation approach under a realistic system model: the quality of the wireless channel Is time-varying; and there are other downlink traffics in the system.
Kwok, YK, Yeung, MKH
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On the performance of routing algorithms in wormhole-switched multicomputer networks [PDF]
, 2005 This paper presents a comparative performance study of adaptive and deterministic routing algorithms in wormhole-switched hypercubes and investigates the performance vicissitudes of these routing schemes under a variety of network operating conditions ...
Ould-Khaoua, M., Shahrabi, A.
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Delayed precise invalidation โ a software cache coherence scheme [PDF]
IEE Proceedings - Computers and Digital Techniques, 1996 Software cache coherence schemes are very desirable in the design of scalable multiprocessors and massively parallel processors. The authors propose a software cache coherence scheme named 'delayed precise invalidation' (DPI). DPI is based on compiler-time markings of references and a hardware local invalidation of state data in parallel and ...
T.-S. Hwang, N.-P. Lu, C.-P. Chung
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Optimal memory time Cache partitioning in chip-multiprocessors
Tongxin xuebao, 2012 Optimal memory time Cache partitioning(OMTP) was proposed.The OMTP can get the average access invalidation overheads of different application and Cache line distributation about Cache hit through the characteristic obtain unit.According to which the OMTP
Hao LI, Lun-guo XIE
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AN AGENT BASED TRANSACTION PROCESSING SCHEME FOR DISCONNECTED MOBILE NODES [PDF]
ICTACT Journal on Communication Technology, 2010 We present a mobile transaction framework in which mobile users can share data which is stored in the cache of a mobile agent. This mobile agent is a special mobile node which coordinates the sharing process.
J.L. Walter Jeyakumar, R.S. Rajesh
doaj
Efficient Cache Invalidation in Mobile Environments [PDF]
[[abstract]]In a mobile environment, caching data items at the mobile clients is important as it reduces the data access time and bandwidth utilization. While caching is desirable, it may cause data inconsistency between the server and the mobile clients
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Selective, accurate, and timely self-invalidation using last-touch prediction [PDF]
, 2000 Communication in cache-coherent distributed shared memory (DSM) often requires invalidating (or writing back) cached copies of a memory block, incurring high overheads.
An-chow Lai, Babak Falsafi
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