Results 31 to 40 of about 4,206 (156)
FASTM: a log-based hardware transactional memory with fast abort recovery [PDF]
, 2009 Version management, one of the key design dimensions of Hardware Transactional Memory (HTM) systems, defines where and how transactional modifications are stored. Current HTM systems use either eager or lazy version management.
González Colás, Antonio María +2 more
core +1 more source
Distributed data cache designs for clustered VLIW processors [PDF]
, 2005 Wire delays are a major concern for current and forthcoming processors. One approach to deal with this problem is to divide the processor into semi-independent units referred to as clusters.
Gibert Codina, Enric +2 more
core +2 more sources
VIPS: simple, efficient, and scalable cache coherence [PDF]
, 2016 Directory-based cache coherence is the de-facto standard for scalable shared-memory multi/many-cores and significant effort is invested in reducing its overhead.
Ros, Alberto
core +1 more source
Using Flow Specifications of Parameterized Cache Coherence Protocols for Verifying Deadlock Freedom
, 2014 We consider the problem of verifying deadlock freedom for symmetric cache coherence protocols. In particular, we focus on a specific form of deadlock which is useful for the cache coherence protocol domain and consistent with the internal definition of ...
A. Bouajjani +27 more
core +1 more source
Basis Token Consistency: A Practical Mechanism for Strong Web Cache Consistency [PDF]
, 2001 With web caching and cache-related services like CDNs and edge services playing an increasingly significant role in the modern internet, the problem of the weak consistency and coherence provisions in current web protocols is becoming increasingly ...
Bestavros, Azer, Bradley, Adam D.
core +1 more source
Hare: a file system for non-cache-coherent multicores [PDF]
, 2015 Hare is a new file system that provides a POSIX-like interface on multicore processors without cache coherence. Hare allows applications on different cores to share files, directories, and file descriptors.
Barak A. +12 more
core +1 more source
Theory and Practice of Transactional Method Caching [PDF]
, 2005 Nowadays, tiered architectures are widely accepted for constructing large scale information systems. In this context application servers often form the bottleneck for a system's efficiency.
Lockemann, Peter C., Pfeifer, Daniel
core +3 more sources
, 2011 Directory-based cache coherence is a popular mechanism for chip multiprocessors and multicores. The directory protocol, however, requires multicast for invalidation messages and the collection of acknowledgement messages, which can be expensive in terms ...
Cho, Myong Hyon +4 more
core
Predicate Abstraction with Indexed Predicates [PDF]
, 2004 Predicate abstraction provides a powerful tool for verifying properties of infinite-state systems using a combination of a decision procedure for a subset of first-order logic and symbolic methods originally developed for finite-state model checking.
Bryant, Randal E., Lahiri, Shuvendu K.
core
Cache Serializability: Reducing Inconsistency in Edge Transactions
, 2015 Read-only caches are widely used in cloud infrastructures to reduce access latency and load on backend databases. Operators view coherent caches as impractical at genuinely large scale and many client-facing caches are updated in an asynchronous manner ...
Birman, Ken +2 more
core +1 more source