Results 51 to 60 of about 4,206 (156)

Eliminating invalidation in coherent-cache parallel graph reduction

open access: yes, 1994
Parallel functional programs based on the graph reduction execution model display considerable locality of reference, favouring the use of large cache lines in the implementation of the shared heap on a shared-memory multiprocessor. They also display a very high rate of synchronisation, making conventional weakly-consistent coherency protocols ...
Andrew J. Bennett, Paul H. J. Kelly
openaire   +2 more sources

Toward a Unified Performance and Power Consumption NAND Flash Memory Model of Embedded and Solid State Secondary Storage Systems

open access: yes, 2013
This paper presents a set of models dedicated to describe a flash storage subsystem structure, functions, performance and power consumption behaviors. These models cover a large range of today's NAND flash memory applications.
Boukhobza, Jalil   +2 more
core   +1 more source

Timestamp-based result cache invalidation for web search engines

open access: green, 2011
Şadiye Alıcı   +4 more
openalex   +2 more sources

Home - About - Disclaimer - Privacy