, 2017 Hardware performance monitoring (HPM) is a crucial ingredient of performance analysis tools. While there are interfaces like LIKWID, PAPI or the kernel interface perf\_event which provide HPM access with some additional features, many higher level tools ...
Eitzinger, Jan +3 more
core +1 more source
DNS-BC: Fast, Reliable and Secure Domain Name System Caching System Based on a Consortium Blockchain. [PDF]
Sensors (Basel), 2023 Gao T, Dong Q.
europepmc +1 more source
FragTracer: Real-Time Fragmentation Monitoring Tool for F2FS File System. [PDF]
Sensors (Basel), 2023 Cho M, Kang D.
europepmc +1 more source
High-Efficiency Parallel Cryptographic Accelerator for Real-Time Guaranteeing Dynamic Data Security in Embedded Systems. [PDF]
Micromachines (Basel), 2021 Zhang Z +6 more
europepmc +1 more source
Building Trust for Smart Connected Devices: The Challenges and Pitfalls of TrustZone. [PDF]
Sensors (Basel), 2021 Koutroumpouchos N +2 more
europepmc +1 more source
An ACL2 proof of write invalidate cache coherence [PDF]
, 1998 As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write invalidate cache scheme. In our formalization, an arbitrary number of processors, each with its own local cache, interact with a global memory via a bus which is snooped by the caches.
openaire +1 more source
Eliminating invalidation in coherent-cache parallel graph reduction
, 1994 Parallel functional programs based on the graph reduction execution model display considerable locality of reference, favouring the use of large cache lines in the implementation of the shared heap on a shared-memory multiprocessor. They also display a very high rate of synchronisation, making conventional weakly-consistent coherency protocols ...
Andrew J. Bennett, Paul H. J. Kelly
openaire +2 more sources
Research on the Construction and Application of Breast Cancer-Specific Database System Based on Full Data Lifecycle. [PDF]
Front Public Health, 2021 Jin Y +5 more
europepmc +1 more source
Accelerating sequential programs using FastFlow and self-offloading
, 2010 FastFlow is a programming environment specifically targeting cache-coherent shared-memory multi-cores. FastFlow is implemented as a stack of C++ template libraries built on top of lock-free (fence-free) synchronization mechanisms.
Aldinucci, Marco +4 more
core
Single-Producer/Single-Consumer Queues on Shared Cache Multi-Core Systems
, 2010 Using efficient point-to-point communication channels is critical for implementing fine grained parallel program on modern shared cache multi-core architectures.
Torquati, Massimo
core