Results 71 to 80 of about 132,994 (259)

System Memory Cache on Microprocessors [PDF]

open access: yes, 1997
In this writing assignment is discussed about the system cache memory on the microcomputer system with memoi cache on the microprocessor that is useful to speed up computer performance.
Jalinas, SKom, MM Jalinas, SKom, MM   +1 more
core  

Promoting Safe Opioid Disposal: Experimental Evidence on Behavioral Messaging With Financial Incentives

open access: yesHealth Economics, EarlyView.
ABSTRACT Some patients prescribed opioid pills fail to properly dispose of their unused pills, posing a risk for others. We report results from a pre‐registered field experiment testing whether behaviorally informed reminder cards increase participation in a financial incentive program for returning unused opioid pills among U.S. Veterans.
Mattie Toma   +7 more
wiley   +1 more source

The Capacity of Cache Aided Private Information Retrieval

open access: yes, 2017
The problem of cache enabled private information retrieval (PIR) is considered in which a user wishes to privately retrieve one out of $K$ messages, each of size $L$ bits from $N$ distributed databases.
Tandon, Ravi
core   +1 more source

The Non‐Professional Virtues of the Hospice Volunteer

open access: yesJournal of Applied Philosophy, EarlyView.
ABSTRACT Volunteers have long played a significant role in hospice care. Much of the care volunteers provide consists of weekly hour‐long in‐home visits. Home‐visiting hospice volunteers are not professionals, nor are they strangers or intimates. Hospice volunteers will not typically face moral dilemmas, nor be called upon to make dramatic decisions ...
Michael B. Gill
wiley   +1 more source

The Bazaar as a Model for Knowledge Work

open access: yesKnowledge and Process Management, EarlyView.
ABSTRACT This paper presents fieldwork that extends existing metaphors of knowledge work as a process shaped by hierarchical or market forces. A qualitative, ethnographic study of six knowledge‐intensive businesses in two countries identifies striking parallels with the Middle Eastern bazaar in contrast to Western impersonal markets and hierarchies. We
Reed Elliot Nelson   +2 more
wiley   +1 more source

Defending Against Flush+Reload Attack With DRAM Cache by Bypassing Shared SRAM Cache

open access: yesIEEE Access, 2020
Cache side-channel attack is one of the critical security threats to modern computing systems. As a representative cache side-channel attack, Flush+Reload attack allows an attacker to steal confidential information (e.g., private encryption key) by ...
Minwoo Jang   +3 more
doaj   +1 more source

Moving the shared memory closer to the processors: DDM [PDF]

open access: yes, 1990
Multiprocessors with shared memory are considered more general and easier to program than message-passing machines. The scalability is, however, in favor of the latter.
Hagersten, Erik   +2 more
core   +1 more source

Exact Solutions for the Moving Firefighter Problem on Trees

open access: yesNetworks, EarlyView.
ABSTRACT The moving firefighter problem (MFP) is a more realistic variant of the classic firefighter problem (FP), where firefighters require time for both travel and defense. Unfortunately, the only known exact solution for the MFP does not scale. In this paper, we establish that the MFP is NP‐complete on trees of maximum degree three and present four
Mauro A. Montenegro‐Meza   +4 more
wiley   +1 more source

Efficient and Adaptive Autonomous Guidance and Control of Planetary Rover With Improved Traction Controller and Dynamic Cost Map

open access: yesJournal of Field Robotics, EarlyView.
ABSTRACT Planetary exploration is rapidly gaining importance within the space research community. Autonomous locomotion of rovers requires consideration of several mobility aspects to ensure safety, including avoiding hazardous areas that can cause the robot to become immobilized in soft soil or damaged in sharp terrains.
Alessio De Luca   +3 more
wiley   +1 more source

A Simple Cache Emulator for Evaluating Cache Behavior for SMP Systems

open access: yesActa Polytechnica, 2006
Every modern CPU uses a complex memory hierarchy, which consists of multiple cache memory levels. It is very difficult to predict the behavior of this hierarchy for a given program (for details see [1, 2]).
I. Šimeček
doaj  

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