Results 261 to 270 of about 292,668 (334)

Low‐Voltage and High‐k Properties of Bilayer HZO Capacitors at the Morphotropic Phase Boundary for Next‐Generation Memory Applications

open access: yesAdvanced Science, EarlyView.
The HfxZr1‐xO2‐based ferroelectric/antiferroelectric bilayer capacitor exhibits morphotropic‐phase‐boundary behavior with a high dielectric constant (∼52) at 2 V. Phase engineering stabilizes o/t‐phase coexistence and suppresses m‐phase formation, enabling capacitance enhancement and self‐optimization under cycling for scalable low‐voltage, high‐κ ...
Junseok Kim   +5 more
wiley   +1 more source

Development of 3D-Stacked 1Megapixel Dual-Time-Gated SPAD Image Sensor with Simultaneous Dual Image Output Architecture for Efficient Sensor Fusion. [PDF]

open access: yesSensors (Basel)
Chida K   +18 more
europepmc   +1 more source

CMOS Image Sensors

IEEE Circuits and Devices Magazine, 2005
In this article, we provide a basic introduction to CMOS image-sensor technology, design and performance limits and present recent developments and future directions in this area. We also discuss image-sensor operation and describe the most popular CMOS image-sensor architectures. We note the main non-idealities that limit CMOS image sensor performance,
A. El Gamal, H. Eltoukhy
semanticscholar   +3 more sources

11-bit Column-Parallel Single-Slope ADC With First-Step Half-Reference Ramping Scheme for High-Speed CMOS Image Sensors

IEEE Journal of Solid-State Circuits, 2021
A first-step half-reference ramping (FHR) readout scheme is presented in this study for high frame rate CMOS image sensors (CISs). The proposed readout scheme enhances the conversion speed of a single-slope (SS) analog-to-digital converter (ADC) by ...
Hyeon‐June Kim
semanticscholar   +1 more source

Low Power CMOS Image Sensors Using Two Step Single Slope ADC With Bandwidth-Limited Comparators & Voltage Range Extended Ramp Generator for Battery-Limited Application

IEEE Sensors Journal, 2020
This paper proposes a low-power column-parallel two-step single slope Analog-to-Digital Converter (SS ADC) and voltage range tuned ramp generator for low-power CMOS Image Sensors (CIS).
Himchan Park   +4 more
semanticscholar   +1 more source

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