Results 161 to 170 of about 17,755 (307)

Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference

Advanced Electronic Materials, EarlyView.
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho, Dae‐won Kim, Yujin Kim, Jung‐Heum Na, Yuwon Jeong, Dong‐Yeop Lee, Shinhyun Choi   +6 more
wiley   +1 more source

Microelectrode Arrays Technology for Brain-on-a-Chip Applications. [PDF]

Biosensors (Basel)
Zhao M, Zhang Y, Wang Y, Liu H, Li M, Zhao Y, Zhang L, Huang C.   +7 more
europepmc   +1 more source

Ultra‐Low Power Consumption and Highly Durability in Sm:HfO2 Thin Film Ferroelectric Memristor for Edge Detection

Advanced Electronic Materials, EarlyView.
ABSTRACT With the continuous development of computer image processing, developing efficient and low‐power computing devices has become a key challenge. Memristors have integrated in‐situ storage and computing capabilities, making them an ideal choice for low‐power image processing computing architectures. However, current memristors are confronted with
Tengyu Li, YongRui Wang, Weifeng Zhang, Jikang Xu, Xiaobing Yan   +4 more
wiley   +1 more source

Generation and Verification of Tests for Analog Circuits Subject to Process Parameter Deviations

, 2004
The paper presents a test stimulus generation and fault simulation methodology for the detection of catastrophic faults in analog circuits. The test methodology chosen for evaluation is RMS AC supply current monitoring.
Chalk, CD, Zwolinski, M, Spinks, SJ, Bell, IM   +3 more
core  

Analog Weight Update Rule in Ferroelectric Hafnia, Using picoJoule Programming Pulses

Advanced Electronic Materials, EarlyView.
Resistive, ferroelectric synaptic weights based on BEOL‐compatible hafnia/zirconia nanolaminates are fabricated. Lateral downscaling the devices below 10 µm2 enables 20 ns programming with electrical pulses, dissipating ≤ 3 pJ. Experimental results show that final conductance state is set by pulse amplitude, and is largely independent of the initial ...
Alexandre Baigol, Nikhil Garg, Matteo Mazza, Yanming Zhang, Elisa Zaccaria, Wooseok Choi, Bert Jan Offrein, Laura Bégon‐Lours   +7 more
wiley   +1 more source

A Low-Offset Sense Amplifier with Self-Adaptive Calibration and Dynamic Body-Biased Mitigation Technology for Enhanced SRAM Read Performance. [PDF]

Micromachines (Basel)
Liu Y, Hu Y, Xiao H, Liu Y, Chen J.
europepmc   +1 more source

Spectrum monitor for cognitive radio

, 2010
The concept of a cognitive radio assumes that the receiver is able to determine the activity level across a large range of spectrum in order to assign a channel for its use.
Liang, Siwen
core  

People Counting and Positioning Using Low‐Resolution Infrared Images for FeFET‐Based In‐Memory Computing

Advanced Electronic Materials, EarlyView.
In this work, low‐resolution infrared imaging is combined with a 28 nm FeFET IMC architecture to enable compact, energy‐efficient edge inference. MLC FeFET devices are experimentally characterized, and controlled multi‐level current accumulation is validated at crossbar array level.
Alptekin Vardar, Li Zhang, Alexander Rehmer, Marc Lupp, Subhashree Baskaran, Osama Abdelaal, Franz Müller, Nandakishor Yadav, Bing Li, Thomas Kämpfe   +9 more
wiley   +1 more source

Bridging the gap in silicon photonics: quantum dot lasers and the end of the optical isolator. [PDF]

Light Sci Appl
Pan S, Yang J, Chen S.
europepmc   +1 more source

Power Minimisation Techniques for Testing Low Power VLSI Circuits (PhD Dissertation)

, 2000
Testing low power very large scale integrated (VLSI) circuits has recently become an area of concern due to yield and reliability problems. This dissertation focuses on minimising power dissipation during test application at logic level and register ...
Nicolici, N.
core