SEU-Hardened High-Speed SRAM Design with Self-Refresh and Adjacent-Bit Error Correction. [PDF]
Li T, Tian J, Qi J.
europepmc +1 more source
Total Ionizing Dose Effect Simulation Study on 130 nm CMOS Processor. [PDF]
Liu Y +5 more
europepmc +1 more source
Medium-scale integrated circuits based on p-type 2D semiconducting MoTe<sub>2</sub>. [PDF]
Wang H +13 more
europepmc +1 more source
A full-featured 2D flash chip enabled by system integration. [PDF]
Liu C +13 more
europepmc +1 more source
Sulfur redox mediator for low-temperature flexible amorphous oxide CMOS electronics. [PDF]
Wang M +11 more
europepmc +1 more source
Large-scale complementary carbon nanotube integrated circuits for harsh radiation environments. [PDF]
Zhang K +11 more
europepmc +1 more source
A compact and power efficient full adder-subtractor layout in QCA technology. [PDF]
Majeed AH.
europepmc +1 more source
Optimizing Energy/Current Fluctuation of RF-Powered Secure Adiabatic Logic for IoT Devices. [PDF]
Ribeiro BF, Takahashi Y.
europepmc +1 more source
Oxide interface-based polymorphic electronic devices for neuromorphic computing. [PDF]
Pradhan S +11 more
europepmc +1 more source
Hafnium-Based Ferroelectric Diodes for Logic-in-Memory Application. [PDF]
Han S +10 more
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