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Kazan Engineering and Design School of Information Technologies: From the First- to the Fourth-Generation Computers and Hardware

2017 Fourth International Conference on Computer Technology in Russia and in the Former Soviet Union (SORUCOM), 2017
The article discusses the evolution of Kazan Computer Plant (KZMM, KZ EVM, KME CS), the flagship of electronic engineering in the former USSR. ICL Group took up the baton to keep pace with the rapid development of information technologies and carry on its traditions.
Margarita Badrutdinova, V.F. Gusev, Victor Diachkov, Igor S. Yakimov   +3 more
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Work in Progress - The Integration of Hardware Area Courses in the Computer Engineering Program at UnicenP

Proceedings Frontiers in Education 35th Annual Conference, 2006
The Computer Engineering Program at UnicenP (Centro Universitario Positivo) has an annual serial structure. This paper presents the integration effort of the courses in the hardware area. The focus of this work is the following set of courses: the Computer Engineering Project course of the freshman year, Digital Systems course and Computer Architecture
Edson Pedro Ferlin, Márcio M. Gonçalves, Veronesi Junior   +2 more
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A Hardware Kernel for Scientific/Engineering Computations

1993
Publisher Summary The state-of-the-art of the commonly used floating-point arithmetic is characterized by historical hardware limitations and unsophisticated implementations. Therefore, many of the features of the mathematical real numbers and mathematical operators are lost by improper mappings to the floating-point arithmetic. This chapter presents
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Accelerating high-level engineering computations by automatic compilation of Geometric Algebra to hardware accelerators

2010 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, 2010
Geometric Algebra (GA), a generalization of quaternions, is a very powerful form for intuitively expressing and manipulating complex geometric relationships common to engineering problems. The actual evaluation of GA expressions, though, is extremely compute intensive due to the high-dimensionality of data being processed.
Jens Huthmann, Peter Muller, Florian Stock, Dietmar Hildenbrand, Andreas Koch   +4 more
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Acquisition of teamwork competence in a hardware course: Perceptions and co-regulation of computer engineering students

, 2020
In work environments, it is essential for engineers to have a high level of teamwork competence. Therefore, engineering education programs aim to provide an environment where students can experience working in teams. In this study, perceptions and co-regulation of computer engineering students regarding teamwork were examined in a hardware course ...
Birol Çiloğlugil, Birim Balcı, Nilüfer Atman Uslu   +2 more
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Toward the specification of an ISA for high performance computing engines. I. The hardware perspective

Proceedings of the Twenty-Fifth Hawaii International Conference on System Sciences, 1992
An instruction set architecture (ISA) is a contract between the compiler that provides, in response to a high level language program, directives for the interpreter to carry out, and the interpreter (microarchitecture) that carries out those directives.
M. Butler, D. Dyer, Y. Patt
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Exploring University-Industry Collaboration Trends in Computer Science: A Study on Hardware and Architecture and Software Engineering

IETE Technical Review, 2016
ABSTRACTThis study aims to examine research collaboration between universities and industry in the field of computer science using bibliometric methods. To further understand the impact of individual countries on university–industry (UI) collaboration, data were retrieved from the computer science journal papers included in the Science Citation Index ...
Hsiang Cheng, Chi-Tung Chen, Ling-fang Wei, Chu-lien Yen, Mu-Hsuan Huang   +4 more
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Exploring the hardware/software continuum in a computer engineering capstone design class using FPGA-based programmable logic

Proceedings 2001 International Conference on Microelectronic Systems Education, 2005
The focus of the computer engineering capstone design classes at the University of Alabama in Huntsville, UAH, has been the application of modern design methodology to the development of electronic systems that have both digital hardware and software components.
Sin Ming Loo, B. Earl Wells, Rhonda Gaede   +2 more
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A Biased Mixed-Precision Convolution Engine for Hardware-Efficient Computational Imaging CNN

2023 Asia Pacific Signal and Information Processing Association Annual Summit and Conference (APSIPA ASC), 2023
Hao-Jiun Tu, Yu-Feng Ou, Yong-Tai Chen, Chao-Tsung Huang   +3 more
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A hardware-efficient computing engine for FPGA-based deep convolutional neural network accelerator

Microelectronics Journal, 2022
Xueming Li, Hongmin Huang, Taosheng Chen, Huaien Gao, Xianghong Hu, Xiaoming Xiong   +5 more
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