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Hardware and software perspectives in engineering computing
Computers & Chemical Engineering, 1998What perspectives for engineering computing? With the advances in silicon technology, Teraflops systems made of off-the-shelf microprocessors will be mainstream. The bigger challenge will arise for the management of the data those system will produce in Petabytes. New technologies to store, retrieve and analyse them are needed.
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Proceedings of the Twenty-Fifth Hawaii International Conference on System Sciences, 1992
An instruction set architecture (ISA) is a contract between the compiler that provides, in response to a high level language program, directives for the interpreter to carry out, and the interpreter (microarchitecture) that carries out those directives.
M. Butler, D. Dyer, Yale N. Patt
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An instruction set architecture (ISA) is a contract between the compiler that provides, in response to a high level language program, directives for the interpreter to carry out, and the interpreter (microarchitecture) that carries out those directives.
M. Butler, D. Dyer, Yale N. Patt
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The building blocks of a brain-inspired computer
, 2020Computers have undergone tremendous improvements in performance over the last 60 years, but those improvements have significantly slowed down over the last decade, owing to fundamental limits in the underlying computing primitives.
Jack D. Kendall, Suhas Kumar
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, 2018 Designing a Multi-disciplinary Group Project for Computer Science and Engineering Students
IEEE Global Engineering Education Conference, 2019This paper describes the design of a group-based project that combines both the hardware and software disciplines of our Computer Science (CS) and Computer Engineering (CE) undergraduates.
K. L. Tan, Wooi-Boon Goh
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Hardware based scalable path computation engine for multilayer traffic engineering in GMPLS networks
2008 34th European Conference on Optical Communication, 2008A parallel data-flow hardware based path computation engine that makes multilayer traffic engineering more scalable is proposed. The engine achieves 100 times faster than conventional path computation scheme.
Sho Shimizu +4 more
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Incorporating computer-aided design into an electrical engineering/computer science curriculum
, 1992The restructuring of the circuits and computer hardware courses at the University of Michigan's Department of Electrical Engineering and Computer Science to include a uniform set of electronic design automation (EDA) tools beginning early in the ...
Richard B. Brown
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2010 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, 2010
Geometric Algebra (GA), a generalization of quaternions, is a very powerful form for intuitively expressing and manipulating complex geometric relationships common to engineering problems. The actual evaluation of GA expressions, though, is extremely compute intensive due to the high-dimensionality of data being processed.
Jens Huthmann +4 more
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Geometric Algebra (GA), a generalization of quaternions, is a very powerful form for intuitively expressing and manipulating complex geometric relationships common to engineering problems. The actual evaluation of GA expressions, though, is extremely compute intensive due to the high-dimensionality of data being processed.
Jens Huthmann +4 more
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A Hardware Kernel for Scientific/Engineering Computations
1993Publisher Summary The state-of-the-art of the commonly used floating-point arithmetic is characterized by historical hardware limitations and unsophisticated implementations. Therefore, many of the features of the mathematical real numbers and mathematical operators are lost by improper mappings to the floating-point arithmetic. This chapter presents
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2019 20th International Carpathian Control Conference (ICCC), 2019
This paper presents the motivation and design of a mini-course to teach hardware implementation of neural networks using high-level synthesis (HLS) in less than four hours for engineering education of intelligent embedded computing. By standing on the shoulders of giants, the combination of the real-world problem, decoding the process of neural ...
Huang, Nan-Sheng +3 more
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This paper presents the motivation and design of a mini-course to teach hardware implementation of neural networks using high-level synthesis (HLS) in less than four hours for engineering education of intelligent embedded computing. By standing on the shoulders of giants, the combination of the real-world problem, decoding the process of neural ...
Huang, Nan-Sheng +3 more
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