Results 31 to 40 of about 31,061,629 (202)
Department of Computer Science newsletter 2022
A Newsletter for Friends and Supporters of the Mines Computer Science Department.
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Monolithic UV‐ozone oxidation of Ta forms an ultrathin Ta2O5/TaOx bilayer enabling resistive switching with a vertical defect gradient. A stoichiometric surface layer over an oxygen‐deficient sublayer promotes localized filament nucleation near the top interface, enabling low‐voltage operation, and reduced cycle‐to‐cycle variability.
Seunghoon Yang +11 more
wiley +1 more source
Mechanisms for Parallelism Specialization for the DySER Architecture [PDF]
Specialization is a promising direction for improving processor energy efficiency. With functionality specialization, hardware is designed for application-specific units of computation.
Ho, Chen-Han +3 more
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A Memory-Efficient Hardware Architecture for a Pulse Doppler Radar Vehicle Detector
In this paper, we propose a memory-efficient structure for a pulse Doppler radar in order to reduce the hardware's complexity. The conventional pulse Doppler radar is computed by fast frequency transform (FFT) of all range cells in order to extract ...
Kim, Sang-Dong +3 more
core +1 more source
Multimode Oxide‐Based Optoelectronic Memtransistor for In‐Sensor Vision Processing
A multimode optoelectronic memtransistor (OEMT) is demonstrated for vision explainable artificial intelligence (VXAI) hardware. By integrating optical sensing, electrical masking, and non‐volatile memory, the device enables key operations required for generating saliency information.
Min Gu Lee +10 more
wiley +1 more source
Low‐frequency noise spectroscopy defines the resolvable conductance states of synaptic FeFETs by coupling read‐current fluctuation with usable dynamic range. The resulting noise‐limited bit precision establishes a universal, device‐agnostic reliability metric beyond the memory window, enabling quantitative benchmarking and rational design of high ...
Jaehong Park +12 more
wiley +1 more source
RHINO: reconfigurable hardware interface for computation and radio [PDF]
Field-programmable gate arrays, or FPGAs, provide an attractive computing platform for software-defined radio applications. Their reconfigurable nature allows many digital signal processing (DSP) algorithms to be highly parallelised within the FPGA ...
Scott, Simon
core +1 more source
Memristive‐Gated RC‐Delay Synaptic Transistors for Time‐Encoded Analog in‐Memory Computing
A Memristive‐Gated Transistor for Time‐Encoded Analog In‐Memory Computing — By exploiting the RC delay of a self‐rectifying interface‐type memristor, nonlinear I–V distortion is structurally bypassed, enabling 3‐bit nonvolatile memory, spike‐timing‐based analog encoding, and hardware‐calibrated reservoir‐computing validation within a unified device ...
Yun‐Seo Shin +7 more
wiley +1 more source
The physical realization of artificial neurons is a critical challenge for energy‐efficient neuromorphic computing. This review presents a comprehensive analysis of the evolution of artificial neuron implementations from conventional CMOS to emerging post‐CMOS technologies.
Kannan Udaya Mohanan +4 more
wiley +1 more source
A defect‐engineered Ag/Gd2O3:Nb2O5/Pt rare earth composite oxide memristor enables stable multilevel reservoir states through pulse driven conductance modulation. Experimentally measured device responses are incorporated into a device aware reservoir computing framework for CIFAR‐100 image classification, highlighting the potential of rare earth ...
Hammad Ghazanfar +9 more
wiley +1 more source

