Results 221 to 230 of about 3,987,318 (283)
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Cross-Layer Approximate Hardware Synthesis for Runtime Configurable Accuracy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2021Approximate computing trades off computation accuracy against energy efficiency. The extent of approximation tolerance, however, significantly varies with a change in input characteristics and applications. We propose a novel cross-layer approach for the
Tanfer Alan, A. Gerstlauer, J. Henkel
semanticscholar +3 more sources
DACA: Dynamic Accuracy-Configurable Adders for Energy-Efficient Multi-Precision Computing
IEEE Nanotechnology Magazine, 2023An accuracy-configurable adder (ACA) meets various requirements in energy efficiency and accuracy of many applications. However, it suffers from problems such as a large hardware cost for performing configurations.
Xuemei Fan +5 more
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Accuracy-Configurable Radix-4 Adder With a Dynamic Output Modification Scheme
IEEE Transactions on Circuits and Systems I: Regular Papers, 2021Approximate computing is an efficient approach for reducing computational costs. This method involves a trade-off between computational accuracy and the circuit’s power consumption, delay, and area.
K. Tsai +3 more
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Generic Accuracy Configurable Matrix Multiplication-Addition Accelerator using HLS
2023 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W), 2023Matrix Multiplication-Addition is one of the most common calculations when implementing Machine Learning (ML) algorithms for inference. Edge devices have limited processing power, due to resource and energy constraints, making the execution of these ...
L. G. León-Vega, Jorge Castro-Godínez
semanticscholar +2 more sources
Accuracy-Configurable 2-D Gaussian Filter Architecture for Energy-Efficient Image Processing
IEEE Design and Test, 2021This article integrates the concepts of configurable architectures and approximate computing in the context of 2-D Gaussian filter to provide a solution that enables trading of energy consumption and accuracy.
T. A. Borges +3 more
semanticscholar +3 more sources
Automatic Generation of Resource and Accuracy Configurable Processing Elements
ACM Transactions on Embedded Computing Systems, 2023Low-power consumption and scarce computational resources limit the computation at the edge. Besides, the approximate computing paradigm reports promising techniques for designing accelerators to deal with inherent limitations of the edge, and high-level ...
L. G. León-Vega +3 more
semanticscholar +2 more sources
Exploration on a Low Power Accuracy Configurable Radix-4adder
2022 Fourth International Conference on Emerging Research in Electronics, Computer Science and Technology (ICERECT), 2022Inexact registering can successfully achieve lower computational expenses. With this strategy, computational accuracy is compromised against the circuit's power utilization, inertness, and region.
st Zabeeulla, S. Singh
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A low latency generic accuracy configurable adder
Proceedings of the 52nd Annual Design Automation Conference, 2015High performance approximate adders typically comprise of multiple smaller sub-adders, carry prediction units and error correction units. In this paper, we present a low-latency generic accuracy configurable adder to support variable approximation modes. It provides a higher number of potential configurations compared to state-of-the-art, thus enabling
M. Shafique +3 more
semanticscholar +3 more sources
, 2017
We propose an OpenMP programming environment for fine-grained approximate computing on multi-core cluster architecture with shared and accuracy-reconfigurable floating-point units (FPUs). This shared-FPUs cluster dynamically characterize FP pipeline vulnerability (FPV) and expose it as metadata to a software scheduler for reducing the cost of error ...
Abbas Rahimi, L. Benini, Rajesh K. Gupta
semanticscholar +2 more sources
We propose an OpenMP programming environment for fine-grained approximate computing on multi-core cluster architecture with shared and accuracy-reconfigurable floating-point units (FPUs). This shared-FPUs cluster dynamically characterize FP pipeline vulnerability (FPV) and expose it as metadata to a software scheduler for reducing the cost of error ...
Abbas Rahimi, L. Benini, Rajesh K. Gupta
semanticscholar +2 more sources