Results 111 to 120 of about 62,688 (226)

Tuning I/O Subsystem: A Key Component in RDBMS Performance Tuning [PDF]

Database Systems Journal, 2016
In a computer system, the fastest storage component is the CPU cache, followed by the system memory. I/O to disk is thousands of times slower than an access to memory. This fact is the key for why you try to make effective use of memory whenever possible
Hitesh Kumar SHARMA, Christalin Nelson. S, Sanjeev Kumar SINGH   +2 more
doaj  

Software Grand Exposure: SGX Cache Attacks Are Practical

, 2017
Side-channel information leakage is a known limitation of SGX. Researchers have demonstrated that secret-dependent information can be extracted from enclave execution through page-fault access patterns.
Brasser, Ferdinand, Capkun, Srdjan, Dmitrienko, Alexandra, Kostiainen, Kari, Müller, Urs, Sadeghi, Ahmad-Reza   +5 more
core  

Technique and Instrument for Effective CPU and GPU Access Request Arbitration Using On-Chip Cache

, 2023
Et al. O.Pandithurai
openalex   +2 more sources

Octant overlapping and angle-energy group expanded KBA parallelism of three-dimensional discrete ordinate method

Frontiers in Energy Research
IntroductionTo enhance the parallel efficiency of the conventional KBA spatial decomposition method, this study incorporates octant overlapping and angle-energy group expansion into the source iteration scheme for solving the discrete ordinate equations ...
Jian Guo, Jian Guo, Yang Zou, Yang Zou, Xuechao Zhao, Xuechao Zhao, Rui Yan, Rui Yan   +7 more
doaj   +1 more source

A case study of content delivery networks for the CMS ex-periment [PDF]

EPJ Web of Conferences
In 2029 the LHC will start the high-luminosity LHC program, with a boost in the integrated luminosity resulting in an unprecedented amount of ex- perimental and simulated data samples to be transferred, processed and stored in disk and tape systems ...
Acosta-Silva C., Casals J., Delgado Peris A., Flix Molina J., Hernández J.M., Morcillo Pérez C., Pérez Dengra C., Pérez-Calero Yzquierdo A., Rodríguez Calonge F.J., Sikora A.   +9 more
doaj   +1 more source

Fast Bitmap Fit: A CPU Cache Line friendly memory allocator for single\n object allocations [PDF]

, 2021
Dhruv Mátáni, Gaurav Menghani
openalex   +1 more source

Compad: A Heterogeneous Cache-Scratchpad Cpu Architecture with Data Layout Compaction for Embedded Loop-Dominated Applications

, 2023
Tommaso Marinelli, José Ignacio Gómez, Christian Tenllado, Francky Catthoor   +3 more
openalex   +2 more sources

ECI: a Customizable Cache Coherency Stack for Hybrid FPGA-CPU Architectures [PDF]

, 2022
Abishek Ramdas, Michael Giardino, Runbin Shi, Adam Turowski, David Cock, Gustavo Alonso, Timothy Roscoe   +6 more
openalex   +1 more source

Enabling Atomic Durability for Persistent Memory with Transiently Persistent CPU Cache [PDF]

, 2022
Chongnan Ye, Meng Chen, Qisheng Jiang, Chundong Wang   +3 more
openalex   +1 more source

Revolutionize 3D-Chip Design With Open3DFlow, an Open-Source AI-Enhanced Solution

IEEE Open Journal of Circuits and Systems
The escalating demand for high-performance and energy-efficient electronics has propelled 3D integrated circuits (3D ICs) as a promising solution. However, major obstacles have been the lack of specialized electronic design automation (EDA) software and ...
Yifei Zhu, Zhenxuan Luan, Dawei Feng, Weiwei Chen, Lei Ren, Zhangxi Tan   +5 more
doaj   +1 more source