Results 191 to 200 of about 263,258 (207)

OSCAR: Orchestrating STT-RAM cache traffic for heterogeneous CPU-GPU architectures

Micro, 2016
J. Zhan, Onur Kayiran, G. Loh, C. Das, Yuan Xie   +4 more
semanticscholar   +1 more source

CPU Cache

2011
openaire   +1 more source

Highly reliable and low-power nonvolatile cache memory with advanced perpendicular STT-MRAM for high-performance CPU

2014 Symposium on VLSI Circuits Digest of Technical Papers, 2014
H. Noguchi, K. Ikegami, N. Shimomura, T. Tanamoto, J. Ito, S. Fujita   +5 more
semanticscholar   +1 more source

MonetDB/X100 - A DBMS In The CPU Cache.

IEEE Data Eng. Bull., 2020
Marcin Zukowski, Peter A. Boncz, Niels Nes, Sándor Héman   +3 more
openaire   +1 more source

A hybrid approach to cache management in heterogeneous CPU-FPGA platforms

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2017
Liang Feng 0001, Sharad Sinha, Wei Zhang 0012, Yun Liang 0001   +3 more
openaire   +1 more source

Research on Cache Partitioning and Adaptive Replacement Policy for CPU-GPU Heterogeneous Processors

2017
Juan Fang
exaly  

Performance Optimization by Dynamically Altering Cache Replacement Algorithm in CPU-GPU Heterogeneous Multi-core Architecture

2017
Juan Fang
exaly  

TAP: A TLP-aware cache management policy for a CPU-GPU heterogeneous architecture

2012
Hyesoon Kim
exaly  

Design of Cache Memory System for Next Generation CPU

IEMEK Journal of Embedded Systems and Applications, 2016
exaly  

CPU Cache Memories.

2016
openaire