Results 281 to 290 of about 77,978 (344)

Design and implementation of modified BCD digit multiplier for digit-by-digit decimal multiplier

Analog Integrated Circuits and Signal Processing, 2021
Parthibaraj Anguraj, T. Krishnan
semanticscholar   +1 more source

A novel decimal-to-decimal logarithmic converter

2008 IEEE International Symposium on Circuits and Systems (ISCAS), 2008
This paper presents a novel design and implementation of a 7-digit fixed-point decimal-to-decimal logarithmic converter. Two approaches, binary-based decimal approximation algorithm (algorithm 1) and decimal linear approximation algorithm (algorithm 2), are proposed and investigated. It shows that decimal linear approximation algorithm (algorithm 2) is
null Dongdong Chen, null Younhee Choi, null Li Chen, Daniel Teng, null Khan Wahid, null Seok-Bum Ko   +5 more
openaire   +1 more source

A novel statistical decimal pattern-based surface electromyogram signal classification method using tunable q-factor wavelet transform

Soft Computing - A Fusion of Foundations, Methodologies and Applications, 2020
M. Kutlu Sengul, Turker Tuncer
semanticscholar   +1 more source

Decimals

2011
James A. McLellan, John Dewey
  +4 more sources

A decimal code for the growth stages of cereals

, 1974
J. Zadoks
semanticscholar   +1 more source

Serial Binary-to-Decimal and Decimal-to-Binary Conversion

IEEE Transactions on Computers, 1970
Over ten years ago, Couleur described a serial binary/ decimal conversion algorithm, the BIDEC method. This was a two-step process involving a shift followed by a parallel modification of the data being converted. With the integrated-circuit J-K flip-flop, the implementation of this two-step process requires an excessive amount of control logic.
openaire   +1 more source

A uniform decimal code for growth stages of crops and weeds

, 1991
P. Lancashire, H. Bleiholder, T. Boom, P. Langelüddeke, R. Stauß, E. Weber, A. Witzenberger   +6 more
semanticscholar   +1 more source

Fast Decimal Counting with Binary-Decimal Logic

IEEE Transactions on Nuclear Science, 1964
Speed limits of decimal counting schemes based on binary-to-decimal conversion are considered. A simple "1-2-4-8" decimal logic is described, which is inherently as fast as the basic bistable. A decade for counting in 100-200 Mc/sec range, based on this logic and the tunnel diode-transistor bistable, is presented.
openaire   +1 more source

Color image triple zero-watermarking using decimal-order polar harmonic transforms and chaotic system

Signal Processing, 2021
Chun-peng Wang
exaly  

Repeating Decimals, II

1979
In this chapter we examine the orders of elements of ℤ t , for any number t, and complete our study of repeating decimals. These subjects are closely related, for we showed in Chapter I-12 that the base a expansion of u/t, \({u\over t}=(.a_1a_2\ldots a_da_1a_2\ldots a_da_1\ldots)_a\ =(.a_1a_2\ldots a_d)_a, \) is repeating: $$ {u\over t}=(.a_1a_2 ...
openaire   +1 more source