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Efficient semicustom micropipeline design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1995We present the analytical model and the electrical characterization of a controllable delay component for a micropipeline architecture suitable for being designed with a semicustom design approach. An interesting feature of the component is that it is lockable, i.e., it can be controlled in an on/off fashion, permitting synchronous operation for ...
A. Degloria, OLIVIERI, Mauro
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Collimator Efficiency and Design I. Collimator Efficiency
Physics in Medicine & Biology, 1965The factors influencing the response of a collimator for radioactive isotope scanning are carefully defined and analysed. The penetration of radiation through the collimator has been taken into account and its more complicated effects evaluated by the use of a digital computer.
A D, ROTENBERG, H E, JOHNS
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Microelectronics Reliability, 2015
Abstract System-level ESD robustness is a crucial feature for any electronic system. To achieve the required level of robustness at the lowest cost a design concept is applied which assures matching between PCB protection components and IC IO behaviour under system ESD discharge. It is now widely referred to as system efficient ESD design (SEED).
Harald Gossner, Charvaka Duvvury
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Abstract System-level ESD robustness is a crucial feature for any electronic system. To achieve the required level of robustness at the lowest cost a design concept is applied which assures matching between PCB protection components and IC IO behaviour under system ESD discharge. It is now widely referred to as system efficient ESD design (SEED).
Harald Gossner, Charvaka Duvvury
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Design of Efficient Propulsion for Nanorobots
IEEE Transactions on Robotics, 2014Due to the constraints imposed at low Reynolds number, the design of efficient propulsive systems for nanorobots has proven challenging. In this paper, an approach for the design of an efficient nanorobotic propulsive system was proposed. First, resistive force theory was used to develop a dynamic model for the propulsion of nanorobots, accounting for ...
Xinghua Jia +3 more
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Design of efficient QCA multiplexers
International Journal of Circuit Theory and Applications, 2015SummaryA new methodology to realize efficient multiplexers using quantum‐dot cellular automata (QCA) is presented in this paper. The novel designs here demonstrated fully exploit the intrinsic logic capabilities of the basic building block in the QCA domain: the Majority Gate.
COCORULLO, Giuseppe +3 more
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Proceedings of the 18th annual symposium on Integrated circuits and system design - SBCCI '05, 2005
Summary form only given. Energy efficiency is a key concern in the design of advanced SoC platforms. In this talk we explore the delicate interplay between on-chip communication and power consumption. We move from state-of-the art communication fabrics (shared buses, crossbars), to advanced, "revolutionary" network-on-chip interconnects.
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Summary form only given. Energy efficiency is a key concern in the design of advanced SoC platforms. In this talk we explore the delicate interplay between on-chip communication and power consumption. We move from state-of-the art communication fabrics (shared buses, crossbars), to advanced, "revolutionary" network-on-chip interconnects.
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Power-Efficient Asynchronous Design
20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07), 2007The potential advantage of low power consumption is one of the main reasons why asynchronous logic attracts attention from both industrial and academic circles. A number of low-power asynchronous designs have been proposed since the 1990s. In this paper, an attempt is made to compare the power-efficiency of asynchronous and synchronous designs, and to ...
Yijun Liu +3 more
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Efficient Designs for Adder Comparator
2007 41st Annual Conference on Information Sciences and Systems, 2007When two fixed-point binary values are compared, in average, only two bit positions are dominant to decide its result. To exploit this property in efficient arithmetic operations two types of addition and comparison circuits are considered. A parallel input design that utilizes dynamic asynchronous mechanisms has been implemented by MOSIS AMI 1.5mum ...
Hisako Adachi, Shinji Nakamura
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Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
The continued trend toward increased silicon integration in recent years has enabled large, complex SoC systems encompassing an ever-expanding range of capabilities. Maintaining energy-efficient operation continues to be at the heart of high-performance and low-power mobile applications alike, highlighting the crucial role of low-power design ...
Visvesh S. Sathe 0001, Arif Rahman
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The continued trend toward increased silicon integration in recent years has enabled large, complex SoC systems encompassing an ever-expanding range of capabilities. Maintaining energy-efficient operation continues to be at the heart of high-performance and low-power mobile applications alike, highlighting the crucial role of low-power design ...
Visvesh S. Sathe 0001, Arif Rahman
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Design of Efficient Reversible Multiplier
2013Reversible logic is emerging computing paradigm with applications in Ultra-low power Nano computing, quantum computing, Low power CMOS design, Optical Information Processing, Bioinformatics etc. In this paper, the 4x4 reversible multiplier circuit is proposed with the design of new reversible gate called RAM.
H. G. Rangaraju +2 more
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