Results 291 to 300 of about 1,399,763 (373)

Architecture and applications of a second-generation digital signal processor

ICASSP '85. IEEE International Conference on Acoustics, Speech, and Signal Processing, 2005
The architecture and instruction set of a second-generation VLSI digital signal processor are described. This processor represents a significant advance in VLSI digital signal processors. The device may be differentiated from its predecessors by the fact that it more closely resembles a true microprocessor than other DSP microcomputers.
Cole Erskine, Surendar Magar, Edward R. Caudel, Daniel Essig   +3 more
openaire   +1 more source

A video digital signal processor with a vector-pipeline architecture

1992 IEEE International Solid-State Circuits Conference Digest of Technical Papers, 1992
A description is given of a 2-GOPS, 60-MIPS video digital signal processor ULSI with a vector-pipeline architecture for video CODEC systems, called the vector digital signal processor (VDSP). The VDSP uses 0.8- mu m CMOS technology and contains a discrete cosine transform (DCT) core as a special processing unit.
Kunitoshi Aono, Masaki Toyokura, Toshiyuki Araki, Akihiko Ohtani, Hisashi Kodama, Kiyoshi Okamoto   +5 more
openaire   +1 more source

An architectural study of a digital signal processor for block codes

Proceedings of the 1998 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP '98 (Cat. No.98CH36181), 2002
This paper examines architectural issues for a domain specific digital signal processor (DS-DSP) which is capable of fast decoding of block codes. In real time systems it was not possible before to employ common processors for this task because of a lack of architectural and arithmetical support.
Wolfram Drescher, Menno Mennenga, Gerhard P. Fettweis   +2 more
openaire   +1 more source

The architecture of a vector digital signal processor for video coding

[Proceedings] ICASSP-92: 1992 IEEE International Conference on Acoustics, Speech, and Signal Processing, 1992
Develops a high-performance vector digital signal processor (VDSP) for video coding that can execute instructions at 60 MHz. The VDSP employs a vector pipeline (VP) architecture, which is very well suited for image processing. In the VDSP, a DCT/IDCT circuit (CCITT standard), a two-dimensional space address generator (SAG), and an enhanced ALU to the ...
Toshiyuki Araki, Masaki Toyokura, Masahiro Wakamori, Kunitoshi Aono   +3 more
openaire   +1 more source

EFFICIENT APPLICATIONS AND ARCHITECTURE OF MODERN DIGITAL SIGNAL PROCESSORS [PDF]

Journal of Energy Technology
Digital signal processors have found their roles in various fields of science and technology. With the appearance of problems related to the processing of large quantities of data in real time, it was nec-essary to develop a system that would execute procedures very rapidly and at low cost.
Rimac-Drlje, Snježana, Hocenski, Željko, Hartmann Tolić, Ivana   +2 more
openaire   +2 more sources

Architecture and FPGA Implementation of a Digit-serial RSA Processor

2005
this paper we present an innovative hardware architecture and an FPGA-based implementation of the Montgomery's algorithm based on a digit-serial approach, which allows the basic arithmetic operations to be broken into words and processed in a serialized fashion.
CILARDO, Alessandro, MAZZEO, ANTONINO, ROMANO, LUIGI, G. SAGGESE   +3 more
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A new processor architecture for digital signal transport systems

Proceedings International Conference on Computer Design VLSI in Computers and Processors, 1997
This paper proposes a new processor architecture for manipulating protocols in digital signal transport systems. To realize flexible and high-performance digital signal transport systems, the architecture has unique application-specific hardware with a core CPU. It is derived from an analysis of functions in real systems. A computer simulation confirms
Minoru Inamori, Kenji Ishii, Akihiro Tsutsui, Kazuhiro Shirakawa, Hiroshi Nakada, Toshiaki Miyazaki   +5 more
openaire   +1 more source

Architecture of a Programmable Digital Signal Processor

IEEE Transactions on Computers, 1982
The architecture of a programmable signal processor designed at Bell Laboratories is described.
openaire   +1 more source

A VLSI architecture for the Central Processor of a digital switch

Microprocessing and Microprogramming, 1986
Abstract This paper presents a high performance architecture for the Central Processor of a digital switching machine. Its main processing unit is the Procedure Flow Processor. The Procedure Flow Processor exploits the parallelism obtainable in the call processing environment and the softness in its real-time requirements to reduce its requirements ...
P. Dasiewicz, P.F. Corbett, R.E. Seviora
openaire   +1 more source

Advanced Architectures for Digital Signal Processors.

1985
Abstract : This report is concerned with the development and application of improved techniques for digital signal processing, based on use of residue number system (RNS) to implement the processing functions associated with isolated-word speech recognition.
W. L. Eastman, D. O. Carhoun, A. L. Bequillard   +2 more
openaire   +1 more source