Results 331 to 340 of about 1,399,763 (373)

A basic processor for teaching digital circuits and systems design with FPGA

2012 VIII Southern Conference on Programmable Logic, 2012
Maicon Carlos Pereira, Paulo Viniccius Viera, André L. A. Raabe, C. Zeferino   +3 more
semanticscholar   +1 more source

TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2015
F. Akopyan, J. Sawada, A. Cassidy, Rodrigo Alvarez-Icaza, J. Arthur, P. Merolla, Nabil Imam, Yutaka Y. Nakamura, Pallab Datta, Gi-Joon Nam, B. Taba, Michael P. Beakes, B. Brezzo, J. B. Kuang, R. Manohar, W. Risk, Bryan L. Jackson, D. Modha   +17 more
semanticscholar   +1 more source

CORDIC-based VLSI architectures for digital signal processing

IEEE Signal Processing Magazine, 1992
Yu-Hen Hu
semanticscholar   +1 more source

Estimating error rates in processor-based architectures

, 2000
S. Rezgui, R. Velazco, R. Ecoffet, S. Rodríguez, J. R. Mingo   +4 more
semanticscholar   +1 more source

Specification for a reconfigurable optoelectronic VLSI processor suitable for digital signal processing.

Applied Optics, 1998
D. Fey, B. Kasche, C. Burkert, O. Tschäche   +3 more
semanticscholar   +1 more source

Efficient Memory-Addressing Algorithms for FFT Processor Design

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2015
Hsin-Fu Luo, Yi-Jun Liu, M. Shieh
semanticscholar   +1 more source

An image processor for digital film

IEEE International Conference on Application-Specific Systems, Architectures, and Processors, 2005
Amilcar do Carmo Lucas, R. Ernst
semanticscholar   +1 more source

Predicting error rate for microprocessor-based digital architectures through C.E.U. (Code Emulating Upsets) injection

, 2000
R. Velazco, S. Rezgui, R. Ecoffet
semanticscholar   +1 more source

Formal Verification for Fault-Tolerant Architectures: Prolegomena to the Design of PVS

IEEE Trans. Software Eng., 1995
S. Owre, J. Rushby, N. Shankar, F. V. Henke   +3 more
semanticscholar   +1 more source

Estimating error rates in processor-based architectures

IEEE Transactions on Nuclear Science, 2001
S Rezgui, R Velazco, R Ecoffet
exaly