Results 51 to 60 of about 862,429 (261)
Advanced Intelligent Systems, EarlyView.An intelligent piezoelectric vibration control system integrating self‐sensing, autonomous operation, and adaptive bias‐flip synchronized switching damping (SSD) is developed. The system detects vibration extrema, executes synchronized switching control, and autonomously establishes the bias voltage without external sensing instruments, achieving ...
Hao Tang, Weiqun Liu, Guobiao Hu
wiley +1 more source
, 2008 In this paper, a different configuration based on different DC bus voltage for a diode-clamped multilevel inverter has been presented. Two different symmetrical and asymmetrical arrangements of a four-level diode clamped inverters have been compared, in ...
Nami, A. +15 more
core +1 more source
Research of dead-time compensation strategy for three-level inverter
Gong-kuang zidonghua, 2013 The paper analyzed dead-time effect and working principle of diode-clamped three-level inverter, proposed a dead-time compensation method which is suitable for diode-clamped three-level inverter based on double carrier modulation.
YANG Ning, ZHANG Lin, XU Chun-yu
doaj
Chemistry – A European Journal, EarlyView.A unimolecular polyampholytic graft copolymer matrix provides a protective confinement for an electrostatically embedded tetrapyridophenazine‐bridged heterodinuclear Ru‐Pt hydrogen evolving photocatalyst. The matrix slows the degradation kinetics of the catalyst and at the same time does not hinder its repair by ammonium persulfate.
Yurii Utievskyi +10 more
wiley +1 more source
Designing of Different High Efficiency Diode Clamped Multilevel [PDF]
, 2015 This research work is aimed at designing of high efficiency multilevel diode clamped inverter. It would cover diode clamped multilevel inverter with particular reference to the comparison of high level and low level inverter using efficient modulation ...
Mubarak Ahmad, Mubarak Ahmad +2 more
core +1 more source
IEEE AccessThe paper presents a control strategy for balancing DC-link capacitor voltages in a five-level hybrid diode-clamped (5L-HDC) inverter, consisting of two half-bridges and diode-clamped cells.
Min-Seok Kim, Dinh Du To, Dong-Choon Lee
doaj +1 more source
Electron, EarlyView.The underlying interface physics and engineering strategies across key POI material systems, including LiNbO3/Si, LiNbO3/SiC, LiNbO3/diamond, and AlN/diamond, were reviewed. The key engineering strategies such as atomic‐scale bonding optimization, nanostructuring, ultrathin phonon‐bridge interlayers, and ferroelectric domain wall engineering for ...
Yunjia Bao +6 more
wiley +1 more source
Fabrication and characterisation of polysilicon-based clamped-clamped filter
, 2011 The rapid growth of micromaching technology makes the miniaturized or integrated MEMS resonator or filter become possible. This paper reports on the fabrication and characterization of the polysilicon-based RF MEMS filter, comprised of the two clamped ...
Yong Mei Zhao +8 more
core +1 more source
Loss comparison of 2 and 3-level inverter topologies
, 2010 This paper investigates semiconductor and DC-link capacitor losses in two two-level and two three-level voltage source inverters. The components of the four inverters are selected to have appropriate voltage and current ratings.
Orfanoudakis, G. +3 more
core +1 more source
Implementation of artificial neural network based controller for a five-level converter based UPQC
Alexandria Engineering Journal, 2018 To reduce the cost and complexity of the system, ANN controller is proposed for a five-level converter based UPQC which eliminates mathematical operations such as a-b-c to d-q-0 transformation and complex controllers such as DSP’s and FPGA’s,. This paper
Sudheer Vinnakoti, Venkata Reddy Kota
doaj +1 more source