Results 201 to 210 of about 1,484,638 (238)
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VLSI implementation of discrete wavelet transform
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1996This paper presents a VLSI implementation of discrete wavelet transform (DWT). The architecture is systolic in nature and performs both high-pass and low-pass coefficient calculations with only one set of multipliers, in contrast to the approaches presented in the literature. The architecture is simple, modular, and cascadable, and has been implemented
A. Grzeszczak +2 more
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Discrete Wavelet Transforms in Walsh Analysis
Journal of Mathematical Sciences, 2021This paper presents a review of discrete wavelet transforms defined through generalized Walsh functions, including orthogonal discrete wavelet transform, biorthogonal discrete wavelet transform, nonstationary discrete wavelet transform, and periodic discrete wavelet transform, and show their applications in image processing, compression of fractal ...
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A note on irregular discrete wavelet transforms
IEEE Transactions on Information Theory, 1992Estimates of frame bounds for wavelet frames generated by discrete sets in phase space satisfying only a certain density condition are deduced. Numerical examples show that these estimates, which are the sharpest results of this kind known to the authors, are rather poor compared to Daubechies' estimates (see ibid., vol.36, no.5, p.961-1005, 1990) for ...
Peder A. Olsen, Kristian Seip
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Efficient forward discrete wavelet transformer
2017 6th Mediterranean Conference on Embedded Computing (MECO), 2017This paper describes the efficient one-dimensional forward discrete wavelet transformer with 5/3 filter. This design reuses the same registers for both low-pass and high-pass filtering in different time slots. It utilizes 33% less registers, 17% less logic elements, has 7% higher maximum operating frequency and 2% lower total power dissipation than ...
Goran Savic +3 more
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VLSI architectures for discrete wavelet transforms
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1993A folded architecture and a digit-serial architecture are proposed for implementation of one- and two-dimensional discrete wavelet transforms. In the one-dimensional folded architecture, the computations of all wavelet levels are folded to the same low-pass and high-pass filters.
Keshab K. Parhi, Takao Nishitani
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The Discrete Wavelet Transform
1991Abstract : In a general sense, this report represents an effort to clarify the relationship of discrete and continuous wavelet transforms. More narrowly, it focuses on bringing together two separately motivated implementations of the wavelet transform, the algorithm a trous and Mallat's multiresolution decomposition.
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The Design of Discrete Wavelet Transformation Chip
2001In this paper, an explanation on the need for a special discrete wavelet transformation hardware is presented. The development processes that have been carried out which includes simulation (both in MATLAB? and SYNOPSYS?) and synthesis which also used SYNOPSYS?
Zaidi Razak, Mashkuri Yaacob
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Digit pipelined discrete wavelet transform
Proceedings of ICASSP '94. IEEE International Conference on Acoustics, Speech and Signal Processing, 2002The paper describes a digit pipelined architecture for the 1D discrete wavelet transform, assuming a digit-serial model of computation. The use of simple operations and data movement makes it suitable for VLSI implementation and it can be easily mapped onto fine-grain custom VLSI and FPGA-based architectures.
Chetana Nagendra +2 more
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A DISCRETE WAVELET TRANSFORM CODEC DESIGN
Journal of Circuits, Systems and Computers, 2004This manuscript presents a VLSI architecture and its design rule, called embedded instruction code (EIC), to realize discrete wavelet transform (DWT) codec in a single chip. Since the essential computation of DWT is convolution, we build a set of multiplication instruction, MUL, and the addition instruction, ADD, to complete the work.
Yi-Qiang Hu, Bing-Fei Wu, Chorng-Yann Su
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A Higher Density Discrete Wavelet Transform
IEEE Transactions on Signal Processing, 2006This paper describes a new set of dyadic wavelet frames with two generators. The construction is simple, yet the wavelets cover the time-frequency plane in an arrangement that provides a higher sampling in both time and frequency. Specifically, the spectrum of the first wavelet is concentrated halfway between the spectrum of the second wavelet and the ...
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