Results 21 to 30 of about 55,221 (243)
Modeling and Execution of Floating Point Parallel Processing Operation for RISC Processor
The development of processors with sundry suggestions have been made regarding a exactitude definition of RISC, but the prosaic concept is that such a computer has a small set of simple and prosaic instructions, instead of an outsized set of intricate ...
semanticscholar +1 more source
Conversion of Mersenne Twister to double-precision floating-point numbers
The 32-bit Mersenne Twister generator MT19937 is a widely used random number generator. To generate numbers with more than 32 bits in bit length, and particularly when converting into 53-bit double-precision floating-point numbers in $[0,1)$ in the IEEE ...
Harase, Shin
core +1 more source
Reproducibility, accuracy and performance of the Feltor code and library on parallel computer architectures [PDF]
Feltor is a modular and free scientific software package. It allows developing platform independent code that runs on a variety of parallel computer architectures ranging from laptop CPUs to multi-GPU distributed memory systems. Feltor consists of both a
Einkemmer, Lukas +5 more
core +2 more sources
Design of 32-bit Floating Point Unit for Advanced Processors
Floating Point Unit is one of the integral unit in the Advanced Processors. The arithmetic operations on floating point unit are quite complicated.
Amana Yadav, Ila Chaudhary
core +2 more sources
Normalizing or not normalizing? An open question for floating-point arithmetic in embedded systems [PDF]
Emerging embedded applications lack of a specific standard when they require floating-point arithmetic. In this situation they use the IEEE-754 standard or ad hoc variations of it. However, this standard was not designed for this purpose. This paper aims
Gonzalez-Navarro, Sonia +1 more
core +2 more sources
LDAcoop: Integrating non‐linear population dynamics into the analysis of clonogenic growth in vitro
Limiting dilution assays (LDAs) quantify clonogenic growth by seeding serial dilutions of cells and scoring wells for colony formation. The fraction of negative wells is plotted against cells seeded and analyzed using the non‐linear modeling of LDAcoop.
Nikko Brix +13 more
wiley +1 more source
A field programmable gate array based modular motion control platform [PDF]
The expectations from motion control systems have been rising day by day. As the systems become more complex, conventional motion control systems can not achieve to meet all the specifications with optimized results.
Koc, Osman +5 more
core +1 more source
A multiplier plays a vital part in multimedia and digital signal processors. The integer unit alone cannot achieve the desired computational speed required by modern applications.
D. Bormane +3 more
semanticscholar +1 more source
Tandem VHH targeting distinct EGFR epitopes were engineered into a monovalent bispecific antibody (7D12‐EGA1‐Fc) with more potent ADCC without increasing affinity to EGFR. Structural modeling of 7D12‐EGA1‐Fc showed cross‐linking of separate EGFR domains to enhance CD16a engagement on NK cells.
Yuqiang Xu +5 more
wiley +1 more source
Exact and mid-point rounding cases of power(x,y) [PDF]
Research Report N° RR2006-46Correct rounding of the power function is currently based on an iterative process computing more and more accurate intermediate approximations to x^y until rounding correctly becomes possible.
Lauter, Christoph
core +1 more source

