Results 291 to 300 of about 1,587,623 (364)

Nanowire TFET with different Source Compositions applied to Low-Dropout Voltage Regulator

Symposium on Microelectronics Technology and Devices, 2022
This work presents the analysis of vertical nanowire tunnel field-effect transistors (TFETs) and vertical nanowire MOSFET applied to low-dropout voltage regulator (LDO) design. Three TFETs with sources composed by Si, SiGe an Ge are analyzed.
Rodrigo do Nascimento Tolêdo, J. Martino, P. G. Der Agopian   +2 more
semanticscholar   +1 more source

Total Dose Performance at High and Low Dose Rate of a CMOS, Low Dropout Voltage Regulator showing Enhanced Low Dose Rate Sensitivity

2021 IEEE Nuclear and Space Radiation Effects Conference (NSREC), 2021
Results of Cobalt-60 irradiation of a CMOS low dropout voltage regulator at high and low dose rate are, presented. Hardness assurance implications due to observation of ELDRS for analog CMOS microcircuits are, discussed.
D. Hiemstra, S. Shi, Z. Yang, L. Chen
semanticscholar   +1 more source

Low-Dropout Voltage Source: An Alternative Approach for Low-Dropout Voltage Regulators

IEEE Transactions on Circuits and Systems II: Express Briefs, 2014
In this brief, a high-order temperature-compensated 0.6-V low-dropout voltage source (LDVS) is realized in standard 0.13- $\mu\hbox{m}$ CMOS technology. The LDVS operates at supply voltages down to 0.75 V and consumes only 39 $\mu\hbox{A}$ while providing up to 100 mA of load current. Gate-to-channel capacitance values of MOSFETs are employed
Hamed Aminzadeh, Mohammad R. Nabavi, Wouter A. Serdijn   +2 more
openaire   +1 more source

Programmable low dropout voltage regulator

Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05), 2005
We present a design for a low dropout (LDO) voltage regulator is presented using floating-gate techniques to set the regulator output voltage and the ac and dc operating points of the circuit. In comparison with conventional topologies, this approach does not require a feedback resistive divider or a bandgap reference to generate a temperature ...
P. Hasler, null Ai Chen Low
openaire   +1 more source

Fractional Order Low–Dropout Voltage Regulator

2016 8th International Conference on Computational Intelligence and Communication Networks (CICN), 2016
The Internet of Things offers tremendous potential to increasingly harness wireless and portable systems in everyday life. Low-dropout (LDO) linear regulators are essential components in numerous wireless and portable electronic devices and their performance in systems can be very important, given the need to power such devices particularly in ...
Sean Rocke, Craig Ramlal, Arvind Singh
openaire   +1 more source

Low dropout voltage regulator for wireless applications

2002 IEEE 33rd Annual IEEE Power Electronics Specialists Conference. Proceedings (Cat. No.02CH37289), 2003
Low dropout voltage regulators (LDO) are widely used in portable communication products such as cellular phones, pagers, and laptops. In this paper, we present a wide range load (100 mA) LDO designed with 0.25 /spl mu/m CMOS process. By using a fast transient loop, we obtained high performance in transient response and output stability.
null Shan Yuan, B.C. Kim
openaire   +1 more source

Basics of floating-gate low-dropout voltage regulators

Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144), 2002
This paper presents an overview of series voltage regulators, beginning with single-transistor designs and exploring the various design issues and concepts. The regulating characteristics of nFET and pFET single-transistor regulators are compared analytically and experimentally to determine an optimal starting topology.
null Aichen Low, P. Hasler
openaire   +1 more source

Total dose degradation of low-dropout voltage regulators

IEEE Radiation Effects Data Workshop, 2005., 2005
A low dropout voltage regulator that uses a lateral pnp transistor as a pass transistor in the output stage is evaluated for total dose degradation. Degradation occurs from two different mechanisms, one involving gradual degradation due to changes in internal reference voltage resulting in small changes in output voltage saturation characteristics; and
T.F. Miyahira, B.G. Rax, A.H. Johnston
openaire   +1 more source

A 0.5 V low-voltage low-dropout regulator

2017 15th IEEE International New Circuits and Systems Conference (NEWCAS), 2017
This work proposes a low-dropout (LDO) regulator to provide low supply voltage of 0.5 V with the input range from 0.7 V to 0.9 V. The reference voltage of this LDO regulator is generated with the zero temperature coefficient circuit composed by MOS transistors in the subthreshold condition.
Ding-Lan Shen, Ting-Ta Lee
openaire   +1 more source

Design of a Low-Voltage Low-Dropout Regulator

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014
A low-voltage low-dropout (LDO) regulator that converts an input of 1 V to an output of 0.85–0.5 V, with 90-nm CMOS technology is proposed. A simple symmetric operational transconductance amplifier is used as the error amplifier (EA), with a current splitting technique adopted to boost the gain.
Chung-Hsun Huang, Ying-Ting Ma, Wei-Chen Liao   +2 more
openaire   +1 more source