Results 301 to 310 of about 1,587,623 (364)

A low dropout voltage regulator with programmable output

2009 4th IEEE Conference on Industrial Electronics and Applications, 2009
In this paper, we present a low dropout voltage regulator (LDO) which can be programmed to generate four output voltages (3.3 V, 2.5 V, 1.8 V, and 0 V) by the external control signals. Between the error amplifier and the power transistor, we place a simple buffer so that the power supply rejection (PSR) of LDO can be improved.
null Ying-Cheng Wu, null Chun-Yueh Huang, null Bin-Da Liu   +2 more
openaire   +1 more source

Low-Dropout Voltage Regulator Having Multiple Error Amplifiers

International Journal on Communications Antenna and Propagation (IRECAP), 2014
In this paper, a low-dropout voltage (LDO) regulator having multiple error amplifiers was proposed. One of the multiple error amplifiers has a low gain and a wide bandwidth, and another has a high gain and a narrow bandwidth. The multiple error amplifiers are located in the feedback loop of the LDO voltage regulator and selectively perform ...
Tae Ryong Park, Jae Chang Kwak
openaire   +1 more source

Full On-Chip CMOS Low-Dropout Voltage Regulator

IEEE Transactions on Circuits and Systems I: Regular Papers, 2007
This paper proposes a solution to the present bulky external capacitor low-dropout (LDO) voltage regulators with an external capacitorless LDO architecture. The large external capacitor used in typical LDOs is removed allowing for greater power system integration for system-on-chip (SoC) applications.
Robert J. Milliken, Jose Silva-Martinez, Edgar Sanchez-Sinencio   +2 more
openaire   +1 more source

Flipped Voltage Follower Based Low Dropout (LDO) Voltage Regulators: A Tutorial Overview

2018 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID), 2018
This tutorial introduces flipped voltage follower (FVF) based low dropout voltage regulators (LDOs) and their recent advances in the literature. Conventional off-chip output capacitor LDOs deploy an off-chip output capacitor in the range of hundreds of nanofarads to tens of microfarads with an inherent equivalent series resistance (ESR) in order to ...
Punith R. Surkanti, Annajirao Garimella, Paul M. Furth   +2 more
openaire   +1 more source

A capacitor-free CMOS low-dropout voltage regulator

2009 IEEE International Symposium on Circuits and Systems, 2009
This paper presents novel frequency compensation techniques for low-dropout (LDO) voltage regulator. An enhanced active feedback frequency compensation is employed to improve its frequency response. This LDO can provide high stability for loading current range up to 100 mA without loading capacitors.
Chia-Min Chen, Chung-Chih Hung
openaire   +1 more source

Design of a tunable temperature coefficient voltage reference with low-dropout voltage regulator in 180-nm CMOS technology

International Convention on Information and Communication Technology, Electronics and Microelectronics, 2020
This paper presents a voltage reference having a tunable temperature coefficient and a low-dropout voltage supply. The circuit has been designed using the Cadence Virtuoso software package and afterwards processed and measured.
David Osmanović, Ivan Skeledzija, Kresimir Spoljaric, Domagoj Tomic, Josip Mikulić, G. Schatzberger, J. Fellner, A. Barić   +7 more
semanticscholar   +1 more source

Phenothiazine Derivatives as Small‐Molecule Organic Cathodes with Adjustable Dropout Voltage and Cycle Performance

Advances in Materials
Compared with conventional inorganic materials, organic electrodes are competitive candidates for secondary battery cathodes due to their resourcefulness, environmental friendliness, and cost‐effectiveness. Much effort is devoted at the level of chemical
Yanxiang Gong, Weichao Zhang, Zhenjiang Liu, Manman Fang, Jie Yang, Yunsheng Wang, Mingxue Gao, Jun Zhang, Quan‐Hong Yang, Zhen Li   +9 more
semanticscholar   +1 more source

Design of a Low Dropout Voltage Regulator (LDO) Using SCL 180nm CMOS Technology

2024 International Conference on Smart Electronics and Communication Systems (ISENSE)
This paper proposes the design of a low dropout voltage regulator (LDO), simulated using SCL 180nm technology in Cadence design tool. It regulates an output voltage of 1.3V from a supply voltage of 1.8V with a reference voltage of 1.8V.
Roshna M R, Adersh V R
semanticscholar   +1 more source

Digital Defect Based Built-in Self-Test for Low Dropout Voltage Regulators

IEEE European Test Symposium, 2020
With the increasing complexity of electronic components in critical applications, pressure on single components to have zero defects is also increasing.
Mehmet Ince, S. Ozev
semanticscholar   +1 more source

An Implementation of External Capacitor-less Low-DropOut Voltage Regulator in 45nm Technology with Output Voltage Ranging from 0.4V-1.2V

ICCD, 2020
Low-DropOut (LDO) regulators are one of the most essential and critical analog blocks in power management of System-on-Chip (SoC) design. In this work, we present an external capacitor-less LDO voltage regulator design implemented in 45nm technology. The
Farid Uddin Ahmed, Zarin Tasnim Sandhie, M. Chowdhury   +2 more
semanticscholar   +1 more source