Results 211 to 220 of about 30,407 (264)
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LabVIEW DSP - A Hands-on DSP Educational Platform
2009 IEEE 13th Digital Signal Processing Workshop and 5th IEEE Signal Processing Education Workshop, 2009Digital Signal Processing technology has transformed our way of life. It has become a fundamental building block in the biomedical, automotive, aerospace, communications and entertainment industries just to mention a few. Ironically, while these systems require interfacing with real world signals, operate in real-time and dynamically interact and ...
Eduardo Perez, Sam Shearman
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IEEE Communications Magazine, 2007
A new specification was released that, for the first time, "standardizes" the software and firmware infrastructure for a broad base of specialized signal processing devices used within the baseband signal/modem processing engines of an advanced wireless system.
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A new specification was released that, for the first time, "standardizes" the software and firmware infrastructure for a broad base of specialized signal processing devices used within the baseband signal/modem processing engines of an advanced wireless system.
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2002 IEEE International Conference on Acoustics, Speech, and Signal Processing, 2002
The recent trend has been to move DSP education earlier in the curriculum. This paper demonstrates using music to teach sinusoids and MIDI at both the undergraduate (DSP First) and high school (Infinity Project) level.
Yoder, Mark, Doering, E.
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The recent trend has been to move DSP education earlier in the curriculum. This paper demonstrates using music to teach sinusoids and MIDI at both the undergraduate (DSP First) and high school (Infinity Project) level.
Yoder, Mark, Doering, E.
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Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285), 2003
The CW4011 is an SoC containing a DSP with a novel vector architecture. It exploits the parallelism and narrow data typical of image processing to gain high performance at a low cost and power. It contains eight 32-bit datapaths all working off of a single instruction.
John Redford +4 more
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The CW4011 is an SoC containing a DSP with a novel vector architecture. It exploits the parallelism and narrow data typical of image processing to gain high performance at a low cost and power. It contains eight 32-bit datapaths all working off of a single instruction.
John Redford +4 more
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The TigerSHARC DSP architecture
IEEE Micro, 2000This highly parallel DSP architecture based on a short-vector memory system incorporates techniques found in general-purpose computing. It promises sustained performance close to its peak computational rates of 900 MFLOPS (32-bit floating-point) or 3.6 BOPS (16-bit fixed-point).
José Fridman, Zvi Greenfield
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ACM SIGPLAN Notices, 2002
DSPs today are still programmed mainly in assembly code - which somehow seems like a "stone age" approach for the compiler dominated microprocessor world. Now that compilers are moving into the DSP world, does this mean that we see the long-awaited merger of DSPs & micros? Or will DSPs disappear?
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DSPs today are still programmed mainly in assembly code - which somehow seems like a "stone age" approach for the compiler dominated microprocessor world. Now that compilers are moving into the DSP world, does this mean that we see the long-awaited merger of DSPs & micros? Or will DSPs disappear?
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IEEE Signal Processing Magazine, 2000
The processing delay is a serious constraint for speech communication. A one-way end-to-end delay of more than 150 ms can severely degrade the quality of real-time conversations. The components of the total system delay includes the speech frame size, the look ahead, other algorithmic delays, multiplexing delay, processing delay for computation, and ...
Junchen Du +3 more
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The processing delay is a serious constraint for speech communication. A one-way end-to-end delay of more than 150 ms can severely degrade the quality of real-time conversations. The components of the total system delay includes the speech frame size, the look ahead, other algorithmic delays, multiplexing delay, processing delay for computation, and ...
Junchen Du +3 more
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Microprocessing and Microprogramming, 1989
Abstract Universal board for digital signal processing applications is presented in this paper. It is designed to be a flexible, versatile board, wich satisfies different requirements found in the field of digital signal processing (DSP), yet to be of modest hardware complexity.
M. Vlajnic +3 more
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Abstract Universal board for digital signal processing applications is presented in this paper. It is designed to be a flexible, versatile board, wich satisfies different requirements found in the field of digital signal processing (DSP), yet to be of modest hardware complexity.
M. Vlajnic +3 more
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IEEE Signal Processing Magazine, 1995
The University of Florida is developing a technology-based comprehensive engineering educational delivery system for the study of digital processing (DSP). The DSP curriculum, which covers both the undergraduate and graduate programs, exhibits a commitment to cooperative learning and personal computer-based instructional (CBI) tools.
Fredrick J. Taylor +1 more
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The University of Florida is developing a technology-based comprehensive engineering educational delivery system for the study of digital processing (DSP). The DSP curriculum, which covers both the undergraduate and graduate programs, exhibits a commitment to cooperative learning and personal computer-based instructional (CBI) tools.
Fredrick J. Taylor +1 more
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2002
In this paper we explore design techniques and constraints for enabling high-speed Java-enabled wireless devices. Since Java execution may be required for 3G devices, efficient methods of executing Java bytecode are explored. We begin by setting a historical context for DSP architectures and describe salient characteristics of classical, transitional ...
C. John Glossner +2 more
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In this paper we explore design techniques and constraints for enabling high-speed Java-enabled wireless devices. Since Java execution may be required for 3G devices, efficient methods of executing Java bytecode are explored. We begin by setting a historical context for DSP architectures and describe salient characteristics of classical, transitional ...
C. John Glossner +2 more
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