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Equivalence Checking Using Cuts And Heaps
Proceedings of the 34th Design Automation Conference, 1997This paper presents a verification technique which isspecifically targeted to formally comparing large combinational circuits with some structural similarities. The approach combines the application of BDDs withcircuit graph hashing, automatic insertion of multiple cut frontiers, and a controlled elimination of false negative verification results ...
Andreas Kuehlmann, Florian Krohm
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Equivalence checking for comparing user interfaces
Proceedings of the 7th ACM SIGCHI Symposium on Engineering Interactive Computing Systems, 2015Plastic User Interfaces (UIs) have the capacity to adapt tochanges in their context of use while preserving usability.This exposes users to different versions of UIs that can diverge from each other at several levels, which may cause lossof consistency. This raises the question of similarity betweenUIs.
Oliveira, Raquel +2 more
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1993
We describe the implementation, within Aldebaran of an algorithmic method allowing the generation of a minimal labeled transition system from an abstract model; this minimality is relative to an equivalence relation. The method relies on a symbolic representation of the state space.
J. C. Fernandez, A. Kerbrat, L. Mounier
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We describe the implementation, within Aldebaran of an algorithmic method allowing the generation of a minimal labeled transition system from an abstract model; this minimality is relative to an equivalence relation. The method relies on a symbolic representation of the state space.
J. C. Fernandez, A. Kerbrat, L. Mounier
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Equivalence Checking of Reversible Circuits
2009 39th International Symposium on Multiple-Valued Logic, 2009Determining the equivalence of reversible circuits designed to meet a common specification is considered. The circuits' primary inputs and outputs must be in pure logic states but the circuits may include elementary quantum gates in addition to reversible logic gates.
Robert Wille +3 more
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Sequential equivalence checking using cuts
Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005., 2005This paper presents an algorithm which is an improvement of Van Eijk's algorithm (2000) by incorporating a cutpoints technique (Kuelhmann and Krohm, 1997). Combinational verification often uses the technique to convert large scale circuits to several small ones, which will be verified separately.
Wei Huang, PuShan Tang, Min Ding
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On checking equivalence of simulation scripts
Journal of Logical and Algebraic Methods in Programming, 2021zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Mancini, Toni +4 more
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Equivalence Checking for Intelligent Circuits
2008 International Symposium on Intelligent Information Technology Application Workshops, 2008Equivalence checking is playing a significant role in Intelligent Circuits design. However, the common models for verification either have their complexity problems or have applicable limitations. In order to overcome the deficiencies, a model WGL (Weighted Generalized List) is proposed and based on WGL we give an algorithm for checking.
De-Hui Fan, Guang-Sheng Ma
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High Coverage Concolic Equivalence Checking
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2019A concolic approach, called Slec-Cf, to check sequential equivalence between a high-level (e.g., C++/SystemC) hardware description and an RTL (e.g., Verilog) is presented. Slec-Cf searches for counterexamples over the possible values of a set of "control signals" in a depth-first lexicographic manner, avoiding values that are unrealizable by any ...
Pritam Roy, Sagar Chaki, Pankaj Chauhan
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Equivalence checking of integer multipliers
Proceedings of the 2001 conference on Asia South Pacific design automation - ASP-DAC '01, 2001In this paper, we address on equivalence checking of integer multipliers, especially for the multipliers without structure similarity. Our approach is based on Hamaguchi's backward substitution method with the following improvements: (1) automatic identification of components to form proper cut points and thus dramatically improve the backward ...
null Jiunn-Chern Chen +1 more
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Model checking and equivalence checking
2009Introduction Owing to the advances in semiconductor technology, a large and complex system that has a wide variety of functionalities has been integrated on a single chip. It is called system-on-a-chip (SoC) or system LSI , since all of the components in an electronics system are built on a single chip.
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