Results 271 to 280 of about 435,309 (318)

Faults, Injection Methods, and Fault Attacks

IEEE Design & Test of Computers, 2007
An active attacker can induce errors during the computation of the cryptographic algorithm and exploit the faulty results to extract information about the secret key in embedded systems. We call this kind of attack a fault attack. Fault attacks can break an unprotected system more quickly than any other kind of side-channel attack such as simple power ...
Chong Hee Kim, Jean-Jacques Quisquater
openaire   +1 more source

Fault simulation of multiple faults in PLAs

[1991] Proceedings, Advanced Computer Technology, Reliable Systems and Applications, 2002
A novel approach is presented to the problem of the simulation of multiple crosspoint faults in PLAs (programmable logic arrays). An efficient algorithm is presented that makes use of concepts derived from the critical path method. To reduce memory allocation, the technique makes use of the minimal information set needed for exact analysis.
AMBANELLI M., FAVALLI M., DALPASSO, MARCELLO, OLIVO P., RICCO' B.   +4 more
openaire   +1 more source

Fault modeling and fault equivalence in CMOS technology

Journal of Electronic Testing, 1991
The need for greater reliability in the fault coverage of test sequences for VLSI circuits has led to the proposal for more accurate fault models and test pattern generation tools. Such improvements bring about a large increase in the fault list to be considered and in the CPU time needed to generate the test.
Marie-Lise Flottes, Christian Landrault, Serge Pravossoudovitch   +2 more
openaire   +1 more source

Generic Fault Modelling for Fault Injection

2011
Fault injection is a widely used experimental dependability validation method, with a vast amount of techniques and tools. Within the scope of MOGENTES, an EU 7th framework programme project, tools have been developed which implements three different fault injection techniques; hardware-implemented fault injection, software-implemented fault injection ...
Rickard Svenningsson, Henrik Eriksson, Jonny Vinter, Martin Törngren   +3 more
openaire   +1 more source

Fault identification and accommodation for incipient and abrupt faults

2007 46th IEEE Conference on Decision and Control, 2007
This paper proposes a fault tolerant control strategy for failures belonging to a class of functions including both incipient and abrupt faults. To this purpose a sliding mode controller has been designed ensuring the robust boundedness of system trajectories.
PARLANGELI, GIANFRANCO, D. PACELLA, CORRADINI, Maria Letizia   +2 more
openaire   +2 more sources

Fault simulation of unconventional faults in CMOS circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1991
The authors present a novel technique to study the detection of non-stuck-at faults in CMOS circuits. Gate-level models of CMOS faults not yet adequately covered in the literature are developed. Suitable models for transistor stuck-open and stuck-on, gate-drain shorts, and bridgings are implemented in a fault simulator.
Michele Favalli, Piero Olivo, Maurizio Damiani, Bruno Riccò   +3 more
openaire   +2 more sources

From Fault-Tree To Fault-Identification

IEEE Transactions on Reliability, 1983
Summary: A practical way is given of identifying actual faults, by using a fault tree's complete system of minimal cutsets. For instance, for a fault tree where 20 cutsets are considered with 30 possible primal events, any of them can be found in at most three steps by the proposed FID-algorithm.
openaire   +2 more sources

To fault or not to fault

Nature Geoscience, 2010
Michael Cheadle, Craig Grimes
openaire   +1 more source

Finding Fault in Fault Zones

Science, 2010
The seismogenic behavior of subduction faults depends on the structural evolution of the fault zone.
openaire   +1 more source

Fault Description Based Attribute Transfer for Zero-Sample Industrial Fault Diagnosis

IEEE Transactions on Industrial Informatics, 2021
Liangjun Feng, Chunhui Zhao
exaly