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Victim gate crosstalk fault model
19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings., 2004Crosstalk faults may produce either glitches or additional delays. The impact of glitches on the behavior of synchronous digital ICs has been shown to be less relevant than that of the additional delays. Glitches may be filtered out by the inertial effects of gates.
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Some Reliability Fault-Testing Models
Operations Research, 1972This paper presents several fault-testing models. Our system is composed of n components that either work or fail. The systems treated are the k-out-of-n type (k/n). This system works if and only if k or more of its components work, making the series (n/n) and parallel (1/n) systems special cases.
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2005
Test and validation of the hardware part of a hardware/software (HW/SW) system is a complex problem. Design for Testability (DfT), basically introduced at structural level, became mandatory to constrain design quality and costs. However, as product complexity increases, the test process (including test planning, DfT and test preparation) needs to be ...
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Test and validation of the hardware part of a hardware/software (HW/SW) system is a complex problem. Design for Testability (DfT), basically introduced at structural level, became mandatory to constrain design quality and costs. However, as product complexity increases, the test process (including test planning, DfT and test preparation) needs to be ...
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Principles of model-based fault detection
Annual Review in Automatic Programming, 1992Abstract The paper outlines the principles of fault detection and isolation (FDI) in dynamic systems using a mathematical model of the system. Implemented on a digital computer, these model-based algorithms can efficiently be applied to signal validation, on-line detection of abrupt faults and early fault diagnosis in a long-term system supervision ...
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Co-modelling of Faults and Fault Tolerance Mechanisms
2014Design for dependability is essential for the increasing range of embedded systems with rich digital control. However, the need to model and mitigate faults on the part of the system, user or environment, can introduce complexity into design. We present approaches to the description of realistic and faulty behaviour, as well as fault-tolerance ...
Carl Gamble +3 more
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Model-Based Fault Diagnosis and Fault Tolerant Control
2012The concepts of quantitative fault diagnosis and fault tolerant control are introduced in this chapter. After a thorough introduction, the notion of analytical redundancy relations (ARRs), residuals, and structural analysis for fault diagnosis and isolation (FDI) are presented.
Rochdi Merzouki +3 more
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Digital CMOS Fault Modeling and Inductive Fault Analysis
1999We begin with an overview of digital fault models. Different fault models are classified according to the level of abstraction. The merits and shortcomings of these models are reviewed. The second half of the chapter is devoted to the defect oriented fault modeling methodology or Inductive Fault Analysis, as it is popularly known.
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