Results 241 to 250 of about 273,564 (272)
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Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems, 2011
Caches are known to consume a large part of total microprocessor power. Traditionally, voltage scaling has been used to reduce both dynamic and leakage power in caches. However, aggressive voltage reduction causes process-variation-induced failures in cache SRAM arrays, which compromise cache reliability.
Abbas BanaiyanMofrad +2 more
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Caches are known to consume a large part of total microprocessor power. Traditionally, voltage scaling has been used to reduce both dynamic and leakage power in caches. However, aggressive voltage reduction causes process-variation-induced failures in cache SRAM arrays, which compromise cache reliability.
Abbas BanaiyanMofrad +2 more
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Introducing ToPe‐FFT: An OpenCL‐based FFT library targeting GPUs
Concurrency and Computation: Practice and Experience, 2017SummaryIn this paper, we present our implementation of the fast Fourier transforms on graphic processing unit (GPU) using OpenCL. This implementation of the FFT (ToPe‐FFT) is based on the Cooley‐Tukey set of algorithms with support for 1D and higher dimensional transforms using different radices. Factorization for mix‐radices enables our code to target
Jan, Bilal +5 more
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SIAM Journal on Scientific Computing, 1993
Fast Fourier transform (FFT) algorithms based on the Cooley-Tukey approach [cf. \textit{J. W. Cooley} and \textit{J. W. Tukey}, Math. Comput. 19, 297-301 (1965; Zbl 0127.090)] are developed for single instruction multiple data (SIMD) machines. Any combination of FFT with powers of two as the periods and some alignment requirements for the initial data ...
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Fast Fourier transform (FFT) algorithms based on the Cooley-Tukey approach [cf. \textit{J. W. Cooley} and \textit{J. W. Tukey}, Math. Comput. 19, 297-301 (1965; Zbl 0127.090)] are developed for single instruction multiple data (SIMD) machines. Any combination of FFT with powers of two as the periods and some alignment requirements for the initial data ...
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Parallel Computing, 1987
Several vector component fast Fourier transforms (FFT) are developed for both shared and non-shared multiprocessors. The focus is mainly on the efficiency of the movement of data. First eight FFTs algorithms are reviewed and then they are used to develop two FFTs for vector multiprocessors with shared memory.
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Several vector component fast Fourier transforms (FFT) are developed for both shared and non-shared multiprocessors. The focus is mainly on the efficiency of the movement of data. First eight FFTs algorithms are reviewed and then they are used to develop two FFTs for vector multiprocessors with shared memory.
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Proceedings of the 3rd Workshop on Irregular Applications: Architectures and Algorithms, 2013
The Fast Fourier Transform (FFT) is a widely used numerical algorithm.
Cheng Wang +5 more
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The Fast Fourier Transform (FFT) is a widely used numerical algorithm.
Cheng Wang +5 more
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2010 East-West Design & Test Symposium (EWDTS), 2010
We consider FPGA design flow with C/C++ to Verilog translation and verification and report on FPGA implementation of fast Fourier transform and Wiener filter for noise reduction of speech signals on Xilinx Virtex-4.
S. O. Churayev, B. T. Matkarimov
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We consider FPGA design flow with C/C++ to Verilog translation and verification and report on FPGA implementation of fast Fourier transform and Wiener filter for noise reduction of speech signals on Xilinx Virtex-4.
S. O. Churayev, B. T. Matkarimov
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1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing, 2002
Methods are presented for developing synthesisable FFT cores. These are based on a modular approach in which parameterisable blocks are cascaded to implement the computations required across a range of typical FFT signal flow graphs. The underlying architectural approach combines the use of a digital serial data organisation with generic commutator ...
Ding, TJ, McCanny, JV, Hu, Yi
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Methods are presented for developing synthesisable FFT cores. These are based on a modular approach in which parameterisable blocks are cascaded to implement the computations required across a range of typical FFT signal flow graphs. The underlying architectural approach combines the use of a digital serial data organisation with generic commutator ...
Ding, TJ, McCanny, JV, Hu, Yi
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2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353), 2002
In this paper, an efficient implementation of the Continuous Flow 2N point Real to Complex FFT is presented. The computation is based on the Radix-2 version of Cooley-Tukey algorithm. The key feature of this implementation is the alternation between DIF (Decimation In Frequency) and DIT (Decimation In Time) in the computation of FFT and IFFT of ...
R. Radhouane, P. Liu, C. Modlin
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In this paper, an efficient implementation of the Continuous Flow 2N point Real to Complex FFT is presented. The computation is based on the Radix-2 version of Cooley-Tukey algorithm. The key feature of this implementation is the alternation between DIF (Decimation In Frequency) and DIT (Decimation In Time) in the computation of FFT and IFFT of ...
R. Radhouane, P. Liu, C. Modlin
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Proceedings of the IEEE, 1970
This letter contains a graph paper summarizing many properties of Fourier transforms and fast Fourier transform (FFT) devices. It shows the interrelationships among data block length, frequency resolution sampling rate, FFT stages, and other related variables.
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This letter contains a graph paper summarizing many properties of Fourier transforms and fast Fourier transform (FFT) devices. It shows the interrelationships among data block length, frequency resolution sampling rate, FFT stages, and other related variables.
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Proceedings of ICC '93 - IEEE International Conference on Communications, 2002
A novel formulation of the decimation method fast Fourier transform (FFT) algorithm is introduced. This formulation generalizes both the decimation-in-time (DIT) and the decimation-in-frequency (DIF) FFT algorithms for various radices in multidimensions.
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A novel formulation of the decimation method fast Fourier transform (FFT) algorithm is introduced. This formulation generalizes both the decimation-in-time (DIT) and the decimation-in-frequency (DIF) FFT algorithms for various radices in multidimensions.
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