Results 311 to 320 of about 609,388 (352)

Field programmable gate array implementation of a single-input fuzzy proportional–integral–derivative controller for DC–DC buck converters

, 2016
The design and field programmable gate array implementation of a single-input fuzzy (SIF) proportional–integral–derivative (PID) control scheme applied to DC–DC buck converters are presented.
Changyuan Chang, Yubo Yuan, T. Jiang, Zhongjie Zhou   +3 more
semanticscholar   +1 more source

Field Programmable Gate Arrays

2019
The chapter deals with field-programmable gate arrays (FPGA). The basic stages are shown concerning evolution of programmable logic (from PROMs and PLAs to FPGAs). Next, the evolution of FPGAs is analysed. Three ages of FPGAs are shown. Next, the modern FPGAs produced by Xilinx and Intel (Altera) The last section is devoted to design methods targeting ...
Larysa Titarenko, Małgorzata Mazurkiewicz, Alexander Barkalov   +2 more
openaire   +2 more sources

Introduction to Field-Programmable Gate Arrays

2016
A general introduction to field-programmable gate arrays (FPGA) is presented in this chapter. Some common questions will be answered, such as: What is an FPGA?, How is its architecture?, How can I reconfigure it?, What is a Hardware Description Language (HDL)?.
Jose de Jesus Rangel-Magdaleno, Esteban Tlelo-Cuautle, Luis Gerardo de la Fraga   +2 more
openaire   +2 more sources

High-performance reconfigurable coincidence counting unit based on a field programmable gate array.

Applied Optics, 2015
We present a high-performance reconfigurable coincidence counting unit (CCU) using a low-end field programmable gate array (FPGA) and peripheral circuits.
B. Park, Yong-Su Kim, O. Kwon, Sang-Wook Han, Sung Moon   +4 more
semanticscholar   +1 more source

A 20-ps Time-to-Digital Converter (TDC) Implemented in Field-Programmable Gate Array (FPGA) with Automatic Temperature Correction

IEEE Transactions on Nuclear Science, 2014
This paper presents an automatic temperature correction design for carry chain based time-to-digital converter (TDC) in field-programmable gate array (FPGA).
Weibin Pan, G. Gong, Jianmin Li
semanticscholar   +1 more source

Fine-Grained Fast Field-Programmable Gate Array Scrubbing

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2015
Field-programmable gate arrays provide several relevant advantages for critical systems, such as flexibility and high performance. However, their use in critical systems requires efficient means to mitigate transient faults in the configuration bits ...
G. Nazar, Leonardo P. Santos, L. Carro
semanticscholar   +1 more source

Novel Field-Programmable Gate Array Architecture for Computing the Eigenvalue Decomposition of Para-Hermitian Polynomial Matrices

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014
In this paper, we introduce a field-programmable gate array (FPGA) hardware architecture for the realization of an algorithm for computing the eigenvalue decomposition (EVD) of para-Hermitian polynomial matrices.
Server Kasap, Soydan Redif
semanticscholar   +1 more source

Field Programmable Gate Arrays: An Overview

2015
Field Programmable Gate Arrays (FPGAs) are semiconductor devices that contain logic components connected by a regular, hierarchical programmable interconnect system. The distinguishing characteristic of FPGAs is their on-filed programmability which allows the logic functionality of an FPGA to be re-programmed even after the manufacturing process. FPGAs
Habib Mehrez, Zied Marrakchi, Vinod Pangracious   +2 more
openaire   +2 more sources

Smart sensors based monitoring system for agriculture using field programmable gate array

2014 International Conference on Circuits, Power and Computing Technologies [ICCPCT-2014], 2014
Monitoring of environmental factors is significant over the last few decades. In particular, monitoring agricultural environments for various factors such as temperature, moisture, humidity along with other factors can be of more significance.
S. Mathurkar, Nilesh R. Patel, Rahul B. Lanjewar, Rohit S. Somkuwar   +3 more
semanticscholar   +1 more source

Introducing redundancy in field programmable gate arrays

Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93, 2002
A redundancy scheme and circuitry for field programmable gate arrays (FPGAs) are proposed. The scheme requires the modification of the wiring resource segmentation and the addition of spare rows and selector circuits. An improved yield gross product is quantitatively studied.
Makoto Takahashi, I. Yoshii, Masanori Uchida, K. Kanzaki, Hiroki Muroga, Kazutaka Nogami, Yasuo Kawahara, Yukihiro Saeki, A. Tanaka, Toshio Hibi, Kazuaki Sawada, Takayasu Sakurai, Makoto Ichida, Fumitoshi Hatori   +13 more
openaire   +2 more sources