Results 291 to 300 of about 205,230 (331)

Floating point arithmetic on a RISC

Microprocessing and Microprogramming, 1988
Abstract A set of high-speed floating point procedures for the newly proposed microcoded RISC system is presented. Their performance is compared to that of other RISC-type systems, to other microprocessors as well as mainframes. The performance is found to be competitive and in some cases--exceeding that of other systems.
Jean M. Davila, Andrew J. Phillips, Daniel Tabak   +2 more
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On Floating‐Point Normal Vectors

Computer Graphics Forum, 2010
AbstractIn this paper we analyze normal vector representations. We derive the error of the most widely used representation, namely 3D floating‐point normal vectors. Based on this analysis, we show that, in theory, the discretization error inherent to single precision floating‐point normals can be achieved by 250.2 uniformly distributed normals ...
Quirin Meyer, Jochen Süßmuth, Gerd Sußner, Marc Stamminger, Günther Greiner   +4 more
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Decimal Floating-Point Multiplication

IEEE Transactions on Computers, 2009
Decimal multiplication is important in many commercial applications including financial analysis, banking, tax calculation, currency conversion, insurance, and accounting. This paper presents the design of two decimal floating-point multipliers: one whose partial product accumulation strategy employs decimal carry-save addition and one that employs ...
Mark A. Erle, Brian J. Hickmann, Michael J. Schulte   +2 more
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A floating point unit for the 68040

Proceedings., 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2002
The Motorola 68040 floating point unit (FPU) combines three independent state machines, two data paths, and over 100000 transistors to achieve 8-Mflops peak performance and over 3-Mflops Linpack double-precision performance at the introductory speed of 25 MHz.
Shawn McCloud, Donnie Anderson, Chris DeWitt, Chris Hinds, Ying-Wai Ho, Danny Marquette, Eric Quintana   +6 more
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Floating point micropipeline performance

Journal of Systems Architecture, 1998
Abstract Recent superscalar computer chips implement complex pipelines using independent integer and floating-point units (FPUs). Floating-point performance is critical for many engineering and scientific applications and good floating-point performance requires hardware resources that occupy a major portion of the chip area.
Shlomo Weiss, A. Goldstein
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Floating-point behavioral synthesis

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2001
Traditionally, the data processed by a synthesized digital design is fixed (occasionally variable) width integer, and the functional units available are concomitantly simple ladders, subtractors, multipliers, multiplexers, and so on). The aims of paper work are two-fold: 1) to provide a library of high-level floating-point functions (trigonometric ...
Zaher Abdulkarim Baidas, Andrew D. Brown, Alan Christopher Williams   +2 more
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Customising floating-point designs

Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2003
This paper describes a method for customising the representation of floating-point numbers that exploits the flexibility of reconfigurable hardware. The method determines the appropriate size of mantissa and exponent for each operation in a design, so that a cost function with a given error specification for the output relative to a reference ...
Altaf Abdul Gaffar, Wayne Luk, Peter Y. K. Cheung, Nabeel Shirazi   +3 more
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Floating point Gröbner bases

Mathematics and Computers in Simulation, 1996
zbMATH Open Web Interface contents unavailable due to conflicting licenses.
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The MC68881 Floating-point Coprocessor

IEEE Micro, 1983
This device, a hardware implementation of the proposed IEEE floating-point standard, can operate as a coprocessor on a 32-bit bus or as a peripheral on an 8- or 16-bit bus.
Clayton Huntsman, Duane Cawthron
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Handling of floating point exceptions

Proceedings of the SIGNUM Conference on the Programming Environment for Development of Numerical Software on -, 1978
An IEEE subcommittee on the standardization of microprocessor floating point arithmetic has a proposal under discussion. Part of that proposal concerns overflow and underflow exceptions. The proposal calls for a “gradual” underflow implemented with demoralized numbers.
Thomas W. Eggers, Judson S. Leonard, Mary H. Payne   +2 more
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