Results 51 to 60 of about 7,246 (295)

Improved Real-time Implementation of Adaptive Gassian Mixture Model-based Object Detection Algorithm for Fixed-point DSP Processors

Journal of Measurement Science and Instrumentation, 2010
Foreground moving object detection is an important process in various computer vision applications such as intelligent visual surveillance,HCI,object-based video compression,etc.One of the most successful moving object detection algorithms is based on ...
Byung-eun LEE, Thanh-binh NGUYEN, Sun-tae CHUNG   +2 more
doaj  

Support vector machines implementation over integers modulo-M and Residue Number System

Dyna, 2023
In low-power hardware implementations for classification algorithms, it is often essential to use physical resources efficiently. In this sense, the use of modulo-M integer operations instead of floating-point arithmetic, can lead to better performance,
Sergio Andrés Arenas-Hoyos, Álvaro Bernal-Noreña   +1 more
doaj   +1 more source

All‐in‐One Analog AI Hardware: On‐Chip Training and Inference with Conductive‐Metal‐Oxide/HfOx ReRAM Devices

Advanced Functional Materials, EarlyView.
An all‐in‐one analog AI accelerator is presented, enabling on‐chip training, weight retention, and long‐term inference acceleration. It leverages a BEOL‐integrated CMO/HfOx ReRAM array with low‐voltage operation (<1.5 V), multi‐bit capability over 32 states, low programming noise (10 nS), and near‐ideal weight transfer.
Donato Francesco Falcone, Victoria Clerico, Wooseok Choi, Tommaso Stecconi, Folkert Horst, Laura Bégon‐Lours, Matteo Galetta, Antonio La Porta, Nikhil Garg, Fabien Alibart, Bert Jan Offrein, Valeria Bragaglia   +11 more
wiley   +1 more source

ASIC Design of Butterfly Unit Based on Non-Redundant and Redundant Algorithm

Iranian Journal of Electrical and Electronic Engineering, 2021
Fast Fourier Transform (FFT) processors employed with pipeline architecture consist of series of Processing Elements (PE) or Butterfly Units (BU). BU or PE of FFT performs multiplication and addition on complex numbers. This paper proposes a single BU to
P. Kulkarni, B. Hogade, V. Kulkarni
doaj  

PACoGen: A Hardware Posit Arithmetic Core Generator

IEEE Access, 2019
This paper proposes open-source hardware Posit Arithmetic Core Generator (PACoGen) for the recently developed universal number posit number system, along with a set of pipelined architectures.
Manish Kumar Jaiswal, Hayden K.-H. So
doaj   +1 more source

Floating-Point Arithmetic [PDF]

, 1982
The arithmetic instructions of SDC deal only with integers, and the Function Unit of chapter 10 can only perform arithmetic operations on integers. The calculations which computers are required to carry out may also involve real numbers, which are numbers with integral and fractional parts.
openaire   +1 more source

Sound Randomized Smoothing in Floating-Point Arithmetics

CoRR, 2022
Randomized smoothing is sound when using infinite precision. However, we show that randomized smoothing is no longer sound for limited floating-point precision. We present a simple example where randomized smoothing certifies a radius of $1.26$ around a point, even though there is an adversarial example in the distance $0.8$ and extend this example ...
Václav Vorácek, Matthias Hein 0001
openaire   +3 more sources

Submicron Metasurface Reconfigured Multiband Smart Windows

Advanced Functional Materials, EarlyView.
This work presents a submicron metasurface reconfigured multiband thermochromic smart window. By integrating subwavelength nanostructures into a Fabry−Perot resonator configuration, it mitigates conventional trade‐offs to simultaneously deliver high luminous transmittance and robust solar heating and radiative cooling modulation capabilities ...
Guanya Wang, Shancheng Wang, Bin Li, Xinyi Tian, Rong Liu, Jian Chen, Zhendong Dai, Shouqin Tian, Yi Long   +8 more
wiley   +1 more source

A Latency-Effective Pipelined Divider for Double-Precision Floating-Point Numbers

IEEE Access, 2020
In this article, we propose an effective algorithm of pipelined dividers for double-precision floating-point numbers. This reduces the latency of the previous pipelined dividers without increasing the lookup table size. The experimental results show that
Juwon Yun, Jinyoung Lee, Woo-Nam Chung, Cheong Ghil Kim, Woo-Chan Park   +4 more
doaj   +1 more source

Plasmonic Enhancement of Fluorescence and Protein Dynamics in Living Mammalian Cells

Advanced Materials, EarlyView.
This study demonstrates plasmonic enhancement of the function of fluorescent voltage sensing proteins (genetically encoded voltage indicators, (GEVIs), QuasAr6) in live mammalian cells. Coupling to plasmonic nanoparticles does not just increase fluorescence, but influences the protein photocycle, creating a hybrid sensor with its response speed to ...
Marco Locarno, Qiangrui Dong, Marco Post, Xin Meng, Cristiano Glessi, Nynke Marije Hettema, Nidas Brandsma, Sebbe Blokhuizen, Alejandro Castañeda Garcia, Srividya Ganapathy, Thieme Schmidt, Lars van Roemburg, Bing Xu, Chun‐Ting Cho, Liedewij Laan, Miao‐Ping Chien, Daan Brinks   +16 more
wiley   +1 more source