Results 51 to 60 of about 4,893,936 (283)

Sound Randomized Smoothing in Floating-Point Arithmetics

CoRR, 2022
Randomized smoothing is sound when using infinite precision. However, we show that randomized smoothing is no longer sound for limited floating-point precision. We present a simple example where randomized smoothing certifies a radius of $1.26$ around a point, even though there is an adversarial example in the distance $0.8$ and extend this example ...
Václav Vorácek, Matthias Hein 0001
openaire   +4 more sources

Investigation of Resonance Characteristics of More Than 10 000 Metal‐Coated Silicon MEMS Cantilevers Using Machine Learning

Advanced Engineering Materials, EarlyView.
More than 10 000 metal‐coated silicon MEMS cantilevers are fabricated and characterized to build a large‐scale experimental dataset spanning multiple vibrational modes. Machine learning algorithms are benchmarked to predict resonance frequency and quality factor, with ensemble based models achieving accuracy approaching experimental uncertainty.
Sina Zare Pakzad, Saurabh Thorat, Andre Loch Gesing, Dominik Huber, Christopher Zellner, Patrick Egger, Georg Pfusterschmied, Ulrich Schmid, Michael Schneider   +8 more
wiley   +1 more source

Numerical Difficulties in Pre-University Informatics Education and Competitions

Informatics in Education, 2003
It is easy to underestimate the difficulties of using floating-point numbers in programming. This is especially the case in pre-university informatics education and competitions, where one is often led to believe that floating-point arithmetic is a good ...
Gyula HORVÁTH, Tom VERHOEFF
doaj   +1 more source

All‐in‐One Analog AI Hardware: On‐Chip Training and Inference with Conductive‐Metal‐Oxide/HfOx ReRAM Devices

Advanced Functional Materials, EarlyView.
An all‐in‐one analog AI accelerator is presented, enabling on‐chip training, weight retention, and long‐term inference acceleration. It leverages a BEOL‐integrated CMO/HfOx ReRAM array with low‐voltage operation (<1.5 V), multi‐bit capability over 32 states, low programming noise (10 nS), and near‐ideal weight transfer.
Donato Francesco Falcone, Victoria Clerico, Wooseok Choi, Tommaso Stecconi, Folkert Horst, Laura Bégon‐Lours, Matteo Galetta, Antonio La Porta, Nikhil Garg, Fabien Alibart, Bert Jan Offrein, Valeria Bragaglia   +11 more
wiley   +1 more source

PACoGen: A Hardware Posit Arithmetic Core Generator

IEEE Access, 2019
This paper proposes open-source hardware Posit Arithmetic Core Generator (PACoGen) for the recently developed universal number posit number system, along with a set of pipelined architectures.
Manish Kumar Jaiswal, Hayden K.-H. So
doaj   +1 more source

Support vector machines implementation over integers modulo-M and Residue Number System

Dyna, 2023
In low-power hardware implementations for classification algorithms, it is often essential to use physical resources efficiently. In this sense, the use of modulo-M integer operations instead of floating-point arithmetic, can lead to better performance,
Sergio Andrés Arenas-Hoyos, Álvaro Bernal-Noreña   +1 more
doaj   +1 more source

Floating-Point Arithmetic [PDF]

, 1982
The arithmetic instructions of SDC deal only with integers, and the Function Unit of chapter 10 can only perform arithmetic operations on integers. The calculations which computers are required to carry out may also involve real numbers, which are numbers with integral and fractional parts.
openaire   +1 more source

Beyond Thin Film Limits—Superhard and Hydrogen‐Free Amorphous Carbon Coatings With Over 100 µm Thickness

Advanced Functional Materials, EarlyView.
For the first time, an extreme‐thick laser‐arc PVD ta‐C (DLC) coating exceeding 100 µm is demonstrated, opening up new possibilities for ultra‐high load bearing capacity. This superhard amorphous carbon architecture combines >50% sp3 bonding, robust adhesion and self‐supporting performance, shielding substrates from plastic flow under extreme contact ...
Martin Zawischa, Frank Kaulfuß, Stefan Makowski, Volker Weihnacht   +3 more
wiley   +1 more source

ASIC Design of Butterfly Unit Based on Non-Redundant and Redundant Algorithm

Iranian Journal of Electrical and Electronic Engineering, 2021
Fast Fourier Transform (FFT) processors employed with pipeline architecture consist of series of Processing Elements (PE) or Butterfly Units (BU). BU or PE of FFT performs multiplication and addition on complex numbers. This paper proposes a single BU to
P. Kulkarni, B. Hogade, V. Kulkarni
doaj  

A Latency-Effective Pipelined Divider for Double-Precision Floating-Point Numbers

IEEE Access, 2020
In this article, we propose an effective algorithm of pipelined dividers for double-precision floating-point numbers. This reduces the latency of the previous pipelined dividers without increasing the lookup table size. The experimental results show that
Juwon Yun, Jinyoung Lee, Woo-Nam Chung, Cheong Ghil Kim, Woo-Chan Park   +4 more
doaj   +1 more source