Results 31 to 40 of about 229,100 (188)
Employing FPGA DSP blocks for time-to-digital conversion
Metrology and Measurement Systems, 2023 The paper presents a novel implementation of a time-to-digital converter (TDC) in field-programmable gate array (FPGA) devices. The design employs FPGA digital signal processing (DSP) blocks and gives more than two-fold improvement in mean resolution in ...
P. Kwiatkowski
semanticscholar +1 more source
Advanced Science, EarlyView.Bubbles in soft tissue are the unavoidable consequence of magnesium implant degradation in patients, yet their biological significance remains unclear. Using advanced imaging and spatial transcriptomics, this study reveals a pronounced inflammatory and mechanical response near bubbles, contrasting with pro‐regenerative events closer to the implant ...
Heithem Ben Amara +3 more
wiley +1 more source
A Holistic Approach for Optimizing DSP Block Utilization of a CNN implementation on FPGA [PDF]
, 2017 Deep Neural Networks are becoming the de-facto standard models for image understanding, and more generally for computer vision tasks. As they involve highly parallelizable computations, CNN are well suited to current fine grain programmable logic devices. Thus, multiple CNN accelerators have been successfully implemented on FPGAs.
arxiv +1 more source
Training and Evaluating a Jupyter Notebook Data Science Assistant [PDF]
arXiv, 2022 We study the feasibility of a Data Science assistant powered by a sequence-to-sequence transformer by training a new model JuPyT5 on all publicly available Jupyter Notebook GitHub repositories and developing a new metric: Data Science Problems (DSP).
arxiv
Techno‐Economic Analysis of Membrane‐Based Purification Platforms for AAV Vector Production
Biotechnology and Bioengineering, EarlyView.ABSTRACT Technologies for large‐scale manufacturing of viral vectors for gene therapies, such as tangential flow filtration and membrane chromatography, are under development. In these early stages of process development, techno‐economic analyses are useful for identifying membrane properties yielding the greatest impact on process performance. In this
Juan J. Romero +6 more
wiley +1 more source
World Journal of Otorhinolaryngology - Head and Neck Surgery, EarlyView.ABSTRACT Spasmodic dysphonia is a laryngeal dystonia that can present as adductor, abductor, or mixed types, with or without tremor. The etiology is not understood fully. Comprehensive evaluation is required to establish the diagnosis. Treatments include voice therapy, medications, botulinum toxin injection, laryngeal surgery, deep brain stimulation ...
Aaron J. Jaworek, Robert T. Sataloff
wiley +1 more source
fpgaConvNet: A framework for mapping convolutional neural networks on FPGAs [PDF]
, 2016 Convolutional Neural Networks (ConvNets) are a powerful Deep Learning model, providing state-of-the-art accuracy to many emerging classification problems.
Bouganis, C-S, Venieris, SI
core +1 more source
HARFLOW3D: A Latency-Oriented 3D-CNN Accelerator Toolflow for HAR on FPGA Devices
, 2023 For Human Action Recognition tasks (HAR), 3D Convolutional Neural Networks have proven to be highly effective, achieving state-of-the-art results. This study introduces a novel streaming architecture based toolflow for mapping such models onto FPGAs ...
Bouganis, Christos-Savvas +3 more
core +1 more source
Field Programmable DSP Arrays - A Novel Reconfigurable Architecture for Efficient Realization of Digital Signal Processing Functions [PDF]
Signal & Image Processing : An International Journal (SIPIJ -
AIRCC) Vol.4, No.2, April 2013, 2013 Digital Signal Processing functions are widely used in real time high speed applications. Those functions are generally implemented either on ASICs with inflexibility, or on FPGAs with bottlenecks of relatively smaller utilization factor or lower speed compared to ASIC. The proposed reconfigurable DSP processor is redolent to FPGA, but with basic fixed
arxiv +1 more source
IET Power Electronics, EarlyView.Some of the topologies with a fewer number of power switches are reviewed and scrutinized. An extensive analysis of the topologies, control strategy and applications are presented here, suggesting suitable multilevel inverter solutions to the known industrial application or new research.
Anurag Choudhary +5 more
wiley +1 more source