Results 61 to 70 of about 3,458 (224)
Over the past decades, many systems composed of arrays of microphones have been developed to satisfy the quality demanded by acoustic applications. Such microphone arrays are sound acquisition systems composed of multiple microphones used to sample the ...
Bruno da Silva +2 more
doaj +1 more source
A General and Efficient Framework for the Rapid Design of Miniaturized, Wideband, and High‐Bit RIS
A general and efficient framework is proposed for the rapid design of high‐performance reconfigurable intelligent surfaces (RISs). This framework integrates advanced antenna design techniques and incorporates various load types, quantities, and values to achieve the design of high‐performance RISs.
Jun Wei Zhang +14 more
wiley +1 more source
Hardware-Software Complex for Network-on-Chip Prototyping Using Multiple FPGAs
This paper presents a hardware-software multi-FPGA complex designed for hardware prototyping of networks-on-chip (NoCs). The rationale for the use of multiple FPGAs for NoC prototyping is given.
Mikhail Y. Romashikhin +1 more
doaj +1 more source
Terahertz Channel Modeling, Estimation and Localization in RIS‐Assisted Systems
Reconfigurable intelligent surfaces have become a recent intensive research focus. Based on practical applications, channel strategies for RIS‐assisted terahertz wireless communication systems are categorized into three different types: channel modeling, channel estimation, and channel localization.
Hongjing Wang +9 more
wiley +1 more source
High Performance Biological Pairwise Sequence Alignment: FPGA versus GPU versus Cell BE versus GPP
This paper explores the pros and cons of reconfigurable computing in the form of FPGAs for high performance efficient computing. In particular, the paper presents the results of a comparative study between three different acceleration technologies ...
Khaled Benkrid +5 more
doaj +1 more source
RRAM Variability Harvesting for CIM‐Integrated TRNG
This work demonstrates a compute‐in‐memory‐compatible true random number generator that harvests intrinsic cycle‐to‐cycle variability from a 1T1R RRAM array. Parallel entropy extraction enables high‐throughput bit generation without dedicated circuits. This approach achieves NIST‐compliant randomness and low per‐bit energy, offering a scalable hardware
Ankit Bende +4 more
wiley +1 more source
Ising machines are emerging as specialized hardware solvers for computationally hard optimization problems. This review examines five major platforms—digital CMOS, analog CMOS, emerging devices, coherent optics, and quantum systems—highlighting physics‐rooted advantages and shared bottlenecks in scalability and connectivity.
Hyunjun Lee, Joon Pyo Kim, Sanghyeon Kim
wiley +1 more source
Study and evaluation of automatic offloading for function blocks of applications
Systems using graphical processing units (GPUs) and field-programmable gate arrays (FPGAs) have increased due to their advantages over central processing units (CPUs).
Yoji Yamato
doaj +1 more source
ABSTRACT With the continuous development of computer image processing, developing efficient and low‐power computing devices has become a key challenge. Memristors have integrated in‐situ storage and computing capabilities, making them an ideal choice for low‐power image processing computing architectures. However, current memristors are confronted with
Tengyu Li +4 more
wiley +1 more source
SPICE‐Compatible Compact Modeling of Cuprate‐Based Memristors Across a Wide Temperature Range
A physics‐guided compact model for YBCO memristors is introduced, incorporating carrier trapping, field‐induced detrapping, and a differential balance equation to describe their switching dynamics. The model is compared with experiments and implemented in LTspice, allowing realistic circuit‐level simulations.
Thomas Günkel +6 more
wiley +1 more source

