Results 21 to 30 of about 52,888 (310)
IEEE Access, 2021 This paper presents a 0.46 mW and 2.4 GHz; All-Digital Phase-Locked Loop (ADPLL) through an Injection-Locked Frequency Multiplier (ILFM) and Continuous Frequency Tracking Loop (CFTL) circuitry for low power Internet-of-Thing (IoT) applications.
Muhammad Riaz Ur Rehman +14 more
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Integrated Circuit Signal Generation and Detection Techniques for Microwave and Sub-Millimeter Wave Signals [PDF]
, 2012 The unabated reduction of device feature sizes in semiconductor processes, particularly in complementary metal-oxide semiconductor (CMOS) processes, has served as the enabling factor behind integrated electronic systems of ever increasing complexity and ...
Bohn, Florian
core +1 more source
IEEE Photonics Journal, 2022 We demonstrate the use of a self-injection locked distributed feedback (DFB) diode laser for high-sensitivity detection of acoustic emission (AE) using a fiber-coil Fabry-Perot interferometer (FPI) sensor.
Farzia Karim +3 more
doaj +1 more source
IEEE Access, 2019 The enhanced phase-locked loop (EPLL) adds an amplitude estimate to the conventional phase-locked loop (PLL), which solves the problem of double-frequency disturbance in the Phase-Locked Loop mathematical model at steady state.
Dongyang Sun +4 more
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A Novel Frequency Locked Loop Based on Stochastic Resonance [PDF]
Applied Mechanics and Materials, 2013 Frequency locked loop (FLL) plays an important role in carrier synchronization because of its excellent dynamic performance. However, it performs inadequately in low signal-to-noise ratio (SNR). In this paper, the principle of stochastic resonance (SR) is briefly introduced and a SR processor is proposed.
Wenming Zhu, Zhiqiang Li, Weitong Zhang
openaire +1 more source
A high-efficiency RF transmitter using VCO-derived synthesis: CALLUM [PDF]
, 1998 The combined analog locked-loop universal modulator (CALLUM) is a radio-frequency (RF) transmitter topology which produces a linear output through the use of nonlinear, but highly efficient, RF power amplifiers.
Jennings, D, McGeehan, JP
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IEEE AccessTo handle the low frequency oscillations of the three-phase four-wire inverter grid-connected system caused by small phase-locked range, slow locking speed and large steady-state error of the traditional phase-locked loop, an improved phase-locked loop ...
Guoxuan Cui, Yanwen Wang, Liya Liu
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Fractional‐N multiplying delay‐locked loop with delay‐locked loop‐based injection clock generation
Electronics Letters, 2016 A fractional‐N multiplying delay‐locked loop (MDLL) with delay‐locked loop (DLL)‐based injection clock generation is presented. By exploiting multiphase output of DLL which delay is locked to the period of output frequency, the proposed architecture ...
D.‐W. Jee
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Energies, 2017 The control system of a doubly-fed adjustable-speed pumped-storage hydropower plant needs phase-locked loops (PLLs) to obtain the phase angle of grid voltage.
Wei Luo, Jianguo Jiang, He Liu
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Sensors, 2022 This paper realized a charge pump phase locked loop (CPPLL) frequency source circuit based on 0.15 μm Win GaAs pHEMT process. In this paper, an improved fully differential edge-triggered frequency discriminator (PFD) and an improved differential ...
Ranran Zhao +3 more
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