Results 161 to 164 of about 500 (164)

A Sub-Sampling Phase-Locked Loop With a Robust Agile-Locking Frequency-Locked Loop

2023
Chia-Min Chen, Tsung-Hsien Lin
exaly  

A 0.6-V 44.6-fJ/Cycle Energy-Optimized Frequency-Locked Loop in 65-nm CMOS With 20.3-ppm/°C Stability

IEEE Solid-State Circuits Letters, 2019
Daniel S Truesdell, Anjana Dissanayake, Benton H Calhoun   +2 more
exaly  

Design and Analysis of CMOS Low-Phase-Noise Low-Jitter Subharmonically Injection-Locked VCO With FLL Self-Alignment Technique

IEEE Transactions on Microwave Theory and Techniques, 2016
Hong-Yeh Chang, Yen-Liang Yeh
exaly  

A Fast and Stable Time Locked Loop for Network Time Synchronization with Parallel FLL and PLL

2018
Carsten Andrich, Julia Bauer, Giovanni Del Galdo   +2 more
exaly